Turbo decoder and decoding method

A decoder and decoding technology, applied in the field of turbo decoders and decoding, can solve the problems of long decoding delay and low throughput of turbo decoders, so as to improve throughput and fully reuse hardware resources. , the effect of reducing the decoding delay

Active Publication Date: 2018-07-10
VERISILICON MICROELECTRONICS (CHENGDU) CO LTD +2
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Problems solved by technology

[0006] In view of the above-mentioned shortcoming of prior art, the object of the present invention is to provide a kind of Turbo decoder and decoding method, be used to solve the throughput of Turbo decoder in the prior art is little, the problem such as decoding delay time is long

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  • Turbo decoder and decoding method
  • Turbo decoder and decoding method

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[0066] The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0067] see Figure 2 to Figure 3 . It should be noted that the diagrams provided in this embodiment are only to illustrate the basic concept of the present invention in a schematic way, and the drawings only show the components related to the present invention rather than the number, shape and number of components in actual implementation. For dimension drawing, the type, quantity and proportion of each component can be arbitrarily changed ...

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Abstract

The invention provides a Turbo decoder and a decoding method. The method comprises the following steps of using an input buffer circuit, a first multiplexing circuit and a soft input buffer circuit toreceive address information and soft information and dividing the soft information into multipath parallel signals; using each soft input and soft output decoding circuit to carry out parallel decoding on the multipath signals; using a data cache circuit and external information buffer circuit to carry out delay cache and reading on an external signal acquired through decoding, and avoiding a conflict to memory reading and writing during a parallel decoding process; and then, using each soft input and soft output decoding circuit to carry out parallel decoding, repeating the above steps, andrealizing decoding through multiple iterations. In the invention, a parallel bidirectional iteration Max-Log-Map algorithm is adopted and a throughput and decoding time delay of Turbo decoding are effectively increased; simultaneously, the parallel decoding of WCMDA is realized, the decoding time delay of WCDMA is greatly reduced and hardware resources are fully reused.

Description

technical field [0001] The present invention relates to the technical field of communications, and in particular, to a turbo decoder and a decoding method. Background technique [0002] Turbo code is also known as Parallel Concatenated Convolutional Code (PCCC), which combines convolutional code and random interleaver, fully applies the randomized coding conditions, and realizes the construction of long code from short codes through the interleaver. code, and use soft output iterative decoding to approximate maximum likelihood decoding, so as to obtain decoding performance that is almost close to the limit of Shannon's theory. Turbo codes are widely used in the field of wireless communication, including communication satellites, digital image transmission, and third-generation mobile phones. [0003] figure 1 Shown is a commonly used convolutional turbo encoder in the fields of LTE (Long Term Evolution) and WCDMA (Wideband Code Division Multiple Access), and its specific s...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/27H03M13/00
CPCH03M13/2771H03M13/6525
Inventor 蒋祥顺曾毅
Owner VERISILICON MICROELECTRONICS (CHENGDU) CO LTD
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