A buffer memory management design and implementation method in an industrial internet of things

An industrial Internet of Things, buffer memory technology, applied in the field of buffer memory management design and implementation, to achieve the effect of solving traffic congestion and simple operation

Active Publication Date: 2019-05-03
ZHEJIANG SCI-TECH UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In practical applications, this design can complete the orderly caching of a large amount of data by identifying external operations. The operation is simple, safe and reliable, and can effectively solve problems such as traffic congestion.

Method used

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  • A buffer memory management design and implementation method in an industrial internet of things
  • A buffer memory management design and implementation method in an industrial internet of things
  • A buffer memory management design and implementation method in an industrial internet of things

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Embodiment Construction

[0019] The purpose and effects of the present invention will become more apparent by describing the present invention in detail below in conjunction with the accompanying drawings.

[0020] In the field of Industrial Internet of Things, high-speed real-time communication plays an indispensable and important role. SDRAM has the advantages of large capacity, small size, high read and write efficiency, and low price. It is often used as a data buffer in high-speed communication systems. In the past, the use of SDRAM was only a simple data memory, without considering the problem of storing multiple data frames in SDRAM and then reading them out without memory management. The start address and end address of frame storage will cause confusion in data transmission, resulting in unreliable communication.

[0021] Such as figure 1 As shown, the buffer memory management design and implementation method in a kind of Industrial Internet of Things that the present invention proposes, co...

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Abstract

The invention discloses a buffer memory management design and implementation method in an industrial internet of things. The method comprises the following steps: adopting an FPGA as a main controllerto complete SDRAM initialization and design of a main state machine; the SDRAM memory is divided into an index area and a data area, and in order to facilitate memory management, the SDRAM data areais further divided into 1KB memory blocks with the same size; and completing the design of a data processing module, a read-write index module, a read-write data module and an address control module in the memory management part. The method solves the unreliable problems of data disorder and the like caused by reading a plurality of data frames from an SDRAM (synchronous dynamic random access memory) when the industrial high-speed communication has traffic jam cache, and improves the stability of a communication system.

Description

technical field [0001] The invention relates to the field of the industrial internet of things, in particular to the design and implementation of buffer memory management when traffic congestion occurs during high-speed communication. Background technique [0002] With the development of society, high-speed real-time communication plays an indispensable role in many industries, such as military, security monitoring, industrial motion control, industrial Internet of Things and other fields. All walks of life have higher and higher requirements for high-speed data transmission, so high-speed and large-capacity memory plays a very important role in it. Compared with other memories, SDRAM has the advantages of large capacity, small size, high read and write efficiency, and low price. Therefore, it is often used as a data buffer in systems with a large amount of data processing. [0003] In the past, SDRAM was only used as a simple data storage. However, if there is traffic cong...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16G06F12/0895
Inventor 王成群吴超徐伟强贾宇波
Owner ZHEJIANG SCI-TECH UNIV
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