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Calculation method and device based on multiplier

An operation method and multiplier technology, which is applied to instruments, calculations, electrical digital data processing, etc., can solve problems such as low operation efficiency, high operation pressure, and large power consumption

Active Publication Date: 2021-05-28
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Problems solved by technology

[0003] The embodiment of the present invention provides a computing method and device based on a multiplier, which is used to solve the problems in the prior art that the computing pressure is very high, the computing efficiency is very low, and the power consumption is large

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Embodiment Construction

[0073] Aiming at the problems in the prior art that the computing pressure is very high, the computing efficiency is very low, and the power consumption is high, the embodiment of the present invention provides a computing method based on a multiplier, wherein the multiplier includes a first adder, a first A left shifter, a second adder, a second left shifter, a third adder, a first memory and a second memory. The procedure of this method is as follows figure 1 As shown, the execution steps are as follows:

[0074] S11: After the set period expires, obtain the first multiplier.

[0075] In the RSA encryption and decryption algorithm, usually within a certain period of time, one of the two multipliers to be multiplied is fixed, and the other multiplier is constantly changing. The fixed multiplier can be defined as the first multiplier. The fixed duration can be defined as a set period, which can be but not limited to 2 microseconds.

[0076] S12: According to the second mult...

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Abstract

The invention discloses an operation method and device based on a multiplier. The method includes: obtaining a first multiplier after a set period expires; obtaining the first set number according to the second multiplier set corresponding to the multiplier Subsets and a segment number difference set; call the first adder and the first left shifter to calculate the product of each value in the smallest subset and the first multiplier, and store the obtained product in the first memory in turn; call The second adder and the second left shifter calculate the product of each numerical value in the segment number difference set and the first multiplier, and the obtained product is stored in the second memory in turn; after obtaining the second multiplier, according to the second The multiplier obtains the first product from the first memory and the second product from the second memory respectively; the third adder is called to calculate the sum of the first product and the second product to obtain the sum of the first multiplier and the second multiplier product. The calculation pressure of this solution is greatly reduced, the calculation efficiency is greatly improved, and the power consumption is reduced.

Description

Background technique [0001] With the rapid improvement of computer computing speed and the growing power of Internet distributed computing, the classic RSA public key cryptosystem has become increasingly insecure when the key length is 1024 bits. At present, in order to ensure the security of users, increasing the length of the RSA key is an inevitable trend. However, as the key length develops from 1024 bits to 2048 bits, or even 4096 bits, the security system can increase its inherent security, but the encryption and decryption efficiency will become lower and lower, and the requirements for the computer system will also increase. improve. For this reason, an RSA hardware system with higher execution efficiency is needed to improve the efficiency of the encryption and decryption system. [0002] In the RSA encryption and decryption algorithm, the multiplier is the most important part of the hardware algorithm design. As long as the execution efficiency of the multiplier is...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/523
CPCG06F7/523
Inventor 王千喜王绍刚张庆胜
Owner AEROSPACE INFORMATION
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