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High-speed serial computer expansion bus error note method and device

A high-speed serial and extended bus technology, applied in the field of processors, can solve the problem of inflexible verification of the PCIe bus error handling method, and achieve the effect of flexible verification

Active Publication Date: 2022-07-08
HYGON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the standard of the bus, the error handling method is stipulated. However, the verification process of the error handling method is usually realized by the normal communication process between the PCIe bus controller and the slave device, which is difficult to make Error reproduction, unable to flexibly verify how the PCIe bus handles various types of errors

Method used

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  • High-speed serial computer expansion bus error note method and device
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  • High-speed serial computer expansion bus error note method and device

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Embodiment Construction

[0041] In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0042] The embodiment of the present invention provides a high-speed serial computer expansion bus error injection method, which is applied to the controller of the high-speed serial computer expansion bus PCIe bus, such as figure 1 shown, including:

[0043] Step 101, configure a register for recording errors; in ...

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Abstract

The invention provides a high-speed serial computer expansion bus error note method, which is applied to a controller of a high-speed serial computer expansion bus PCIe bus, comprising: configuring a register for recording errors; sending a first request to a slave device of the PCIe bus, to make the slave device turn off the automatic response function of the second request; send a second request to the slave device to trigger the slave device to send an error-injected data packet to the controller of the PCIe bus; receive the Incorrect data packet; query the register to determine whether to handle the error of the incorrect data packet. The invention can flexibly inject errors into the PCIe controller, so as to flexibly verify the handling methods of the PCIe bus for various types of errors.

Description

technical field [0001] The present invention relates to the technical field of processors, and in particular, to a method and device for injecting errors in a high-speed serial computer expansion bus. Background technique [0002] High-speed serial computer expansion bus PCIe bus is a widely used computer bus with the characteristics of point-to-point, high-bandwidth and reliable transmission. In the standard of this bus, the error handling method is stipulated, but the verification process of the error handling method is usually realized by the normal communication process between the controller and the slave device of the PCIe bus, which is difficult to make The error is reproduced, and it is not flexible to verify how the PCIe bus handles various types of errors. SUMMARY OF THE INVENTION [0003] The high-speed serial computer expansion bus error injection method and device provided by the present invention can flexibly inject errors into the PCIe controller, thereby f...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/22G06F13/40G06F13/42
CPCG06F11/221G06F13/4022G06F13/4282G06F13/4068G06F2213/0026
Inventor 黄玲李婧叶鹏玉倪亚路陈玉龙张攀勇
Owner HYGON INFORMATION TECH CO LTD
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