4 results about "Bus error" patented technology

Bus error handling method This description relates to a bus error handling method, in which one or more first characteristics of a first write transaction (410) destined for a functional unit (116) and passing through a gateway (160,162,164,166,168) are stored, and in which, in the presence of a bus error sent by the functional unit (116): - one or more second characteristics related to said error are stored; - the gateway (160,162,164,166,168) generates a first interrupt (416,420,422,430) which it transmits with said first and second characteristics to a management unit (440); and - the management unit (440) generates at least one second interrupt (SBS_IRQ_NS, SBS_IRQ_SEC) destined for a processing unit (110, 312, 314) depending on the first and / or second characteristics. Figure for the abbreviation: Fig. 4

The invention discloses a CAN bus error frame detection positioning system and method, and relates to the technical field of CAN buses. Aiming at the problems that the traditional CAN bus error frame checking depends on data analysis, oscilloscope detection or one-by-one controller plugging and unplugging, the operation is tedious, and controllers with special installation positions are difficult to process, the method provided by the invention realizes rapid positioning of an error frame source by collecting waveform characteristics of each controller and utilizing AI analysis. According to the technical scheme, the method comprises the steps of waveform data acquisition, AI feature marking, error frame waveform interception and source identification, error frame positioning can be automatically completed, the troubleshooting efficiency is improved, the operation difficulty is reduced, and the method is suitable for fault diagnosis of various vehicle CAN bus systems.

The present application relates to the technical field of industrial automation electronic testing, and specifically relates to an industrial control mainboard anti-interference performance evaluation system and method for a complex disturbance scene, comprising a clock disturbance scene generation module, a dynamic clock interference injection module, a clock bus degradation collection module and an anti-interference level output module; wherein: the clock disturbance scene generation module is used to generate a clock disturbance spectrum; the dynamic clock interference injection module converts the clock disturbance spectrum into a frequency-phase double modulation signal and injects it into the industrial control mainboard under test; the clock bus degradation collection module is used to collect bus error code features caused by clock disturbance in real time; and the anti-interference level output module is used to generate a four-level clock anti-interference level. Through the construction of a closed-loop system of disturbance injection-feature collection-level evaluation, the present application realizes quantitative evaluation and stability determination of the anti-interference capability of the industrial control mainboard under a complex disturbance scene.

The invention discloses a bus error frame identification method and device and a readable storage medium. The method comprises the following steps: acquiring a differential voltage signal and a corresponding current signal of a CAN bus node; performing continuous dominant bit signal extraction on the differential voltage signal based on a dynamic analysis window to obtain an abnormal frame differential voltage signal and a corresponding abnormal frame current signal; determining a voltage change sequence according to the abnormal frame differential voltage signal, and determining a current direction mark according to the abnormal frame current signal; and determining node driving characteristics according to the voltage change sequence, determining a node driving state according to the current direction mark, and determining an error frame identification result according to the node driving characteristics and the node driving state. Through cross validation of the node driving characteristics determined by the voltage change sequence and the node driving state determined by the current direction mark, node-level bus error frame positioning can be realized, and the bus error diagnosis precision is improved.