Multi-channel DAC output signal synchronization method and system

Abstract

The invention discloses a multichannel DAC output signal synchronization method and system, and relates to the field of digital-to-analog conversion, and the method comprises the steps: converting an orthogonal sinusoidal signal which is used as a synchronization signal source in two to-be-synchronized DAC channels into an analog orthogonal sinusoidal signal; carrying out multiplication operation on the analog orthogonal sinusoidal signals of the two DAC channels; filtering the signal output after multiplication so as to detect the output direct-current voltage; and controlling the phase delay of the two DAC channels until the output direct-current voltage reaches a preset value, so that the phases of the two DAC channels are synchronous. According to the invention, on the premise of not depending on a DAC chip to provide a synchronization function, the phase-level synchronization of the DAC can be realized.

Description

technical field [0001] The invention relates to the field of digital-to-analog conversion, in particular to a multi-channel DAC output signal synchronization method and system. Background technique [0002] With the development of modern wireless communication technology and optical fiber communication technology, the communication rate is increasing faster and faster. Digital communication technology has replaced analog communication technology and has become the mainstream technology today. In digital communication technology, digital coherent communication has the advantage of high sensitivity. In the scenario of pursuing sensitivity and data rate, DAC (Digital to Analog Converter, digital-to-analog converter) is the core component of the sending end, and its sampling rate also increases with the communication rate. increase continuously. [0003] In the digital coherent communication scenario, a relatively strict phase synchronization relationship is required between th...

AI Technical Summary

Problems solved by technology

[0004] At present, the existing DAC synchronization technology relies on the inter-chip synchronization function reserved by the DAC chip at the beginning of the design, and most of them can only achieve sample-level synchronization. In the scene where phase-level synchronization is required, the synchronization accuracy is insufficient.

Most high sampling rate DACs do not provide inter-chip synchronization by themselves

Moreover, the synchronization of high-sampling-rate DAC chips is easily affected by differences in physical transmission paths and individual differences in components. It is difficult to achieve phase-level synchronization only by open-loop solutions such as transmission lines of equal length.

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