Method and device for measuring delay performance of RapidIO switch chip

A technology for exchanging chips and performance, applied in the direction of measuring devices, measuring electricity, measuring electrical variables, etc., can solve the problems of unable to exchange delay tests, etc., and achieve the effect of flexible data packet format

Pending Publication Date: 2022-08-05
井芯微电子技术(天津)有限公司
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  • Application Information

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Problems solved by technology

[0007] In view of this, the present invention aims to propose a method and device for measuring the delay performance of a RapidIO switching chip, so as to solve the problem that the switching delay test of the frequency point above 6.25Gbps cannot be performed by using the existing method and device

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  • Method and device for measuring delay performance of RapidIO switch chip

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Embodiment Construction

[0030] It should be noted that the embodiments of the present invention and the features of the embodiments may be combined with each other under the condition of no conflict.

[0031] The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0032] like figure 1 As shown, a method for measuring the delay performance of a RapidIO switching chip, using the RTL code of the RapidIO switching chip as the DUT to be measured;

[0033] The DUT includes a digital circuit code and an analog circuit code, the analog circuit code includes a Serdes model, which is used to generate a RapidIO protocol data message as a test stimulus, and reflects the actual timing behavior of the physical analog circuit; the digital circuit code is in the analog circuit code. Transmission in the DUT driven by the corresponding clock beat;

[0034] The Serdes model is extracted from the actual analog circuit and can accura...

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Abstract

The invention provides a method and a device for measuring delay performance of a RapidIO switching chip. The method comprises the following steps of: taking RTL (Register Transfer Language) codes of the RapidIO switching chip as a DUT (Device Under Test); the DUT comprises a digital circuit code and an analog circuit code, and the analog circuit code comprises a Serdes model and is used for generating a RapidIO protocol data message as test excitation and reflecting an actual time sequence behavior of a physical analog circuit; the digital circuit code is transmitted in the DUT under the driving of a clock beat corresponding to the analog circuit code; and recording a time value T1 corresponding to a rising edge of a first beat data message of the digital circuit code at an input port S0I of the switch chip and a time value T2 corresponding to a rising edge of a first beat data message of S1I, wherein the time difference between T2 and T1 is the delay time of the whole transmission path of the RapidIO switch chip. According to the method and the device for measuring the delay performance of the RapidIO switching chip, the object to be tested is replaced by the RTL design code, so that the problem that the existing tester cannot support the delay test of frequency points of 6.25 Gbps or above of the RapidIO switching chip is solved.

Description

technical field [0001] The invention belongs to the technical field of switching chip delay performance testing, and in particular relates to a method and device for measuring the delay performance of a RapidIO switching chip. Background technique [0002] RapidIO protocol is an interconnection technology for high-performance embedded systems. This technology is mainly used as the internal interconnection of the system and supports chip-to-chip and board-to-board communication. It has the advantages of high bandwidth, low latency and high reliability, and is widely used. in the fields of aerospace, aviation and military. [0003] In order to test the transmission delay performance of the RapidIO switching chip in practical applications, it is necessary to send data packets to the device under test through the tester, and record the transmission delay time of the data packets in the device. [0004] At present, the exchange delay of the RapidIO protocol frequency point of 6....

Claims

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): G01R31/28
CPCG01R31/2882
Inventor朱珂王盼王永胜林谦顾艳伍赵金萍储志博张瑞卿
Owner井芯微电子技术(天津)有限公司