A data frame buffer memory device and method for Ethernet passive optical network

Abstract

The invention refers to a kind of data frame buffer device and method for Ethernet passive optical network, the buffer device and method in the invention use a structure of first-in first-out, in order to realize the memorization and management to variable-length data frame in the Ethernet, it examines the data frame entering the buffer queue at first, writes them to the memory device with first-in first-out mode, one pointer pointing to the data frame are written to the descriptor memory device, at the same time, the length information of the data frame is written to the second area of the descriptors memory device, one data frame corresponds to a descriptor, these descriptors forms the queue with first-in first-out mode, when the pointer pointing to data frame memory structure occurs chaos in the using process, it causes the data frame generate error, but when uses the next descriptor to be used as the new point of the first-in first-0 out queue, the whole structure can be restored according to the new address, thus it maintains the integrity of the data frame memory structure.

Description

technical field [0001] The invention relates to a data frame buffering device and method for an Ethernet passive optical network (EPON). Specifically, the present invention is used to realize the caching device and method of the Ethernet variable-length data frame received and forwarded in the two-layer medium access control (MAC) switching chip of the EPON system. Background technique [0002] According to the provisions of the 802.3 protocol, a set of data bytes should be included in a standard Ethernet frame, which consists of: 7 bytes of preamble (preamble), 1 byte of frame delimiter (SFD), 6-byte source address and 6-byte destination address, 2-byte length / type field, 46-1500-byte data field, and 4-byte frame check series. If it is a half-duplex working mode, it is necessary to increase the carrier extension field for the frame length less than 512 bytes, and increase the length to 512 bytes, that is, the length of the Ethernet frame is changed from 64 bytes to 1518 by...

AI Technical Summary

Problems solved by technology

It has been found that these implementation methods adopted by companies such as GALILEO and SMSC have some shortcomings in practice: one) the storage method adopted in the GT-48360 of GALILEO company is suitable for the storage of fixed-length data frames such as ATM cells; two) SMSC The company's LAN91C111 chip effectively utilizes the storage space in the storage of Ethernet packets, but when the read / write pointer is wrong at a certain moment, it will inevitably affect the read / write operation of subsequent frames, resulting in a series of bad packets. , especially for systems with high processing speed requirements, this kind of error is almost inevitable

However, in the case of asynchronous read and write clocks, its implementation is much more complicated, and some of them involve other patented technologies. For example, in Xilinx App Notes XAPP131, XAPP175 and XAPP151, some RAM state control signals have been involved. methods, but through the analysis in the next section, we will find that their methods are not very suitable for our occasion, they are mainly suitable for some occasions where dual-port RAM is used to design some small FIFOs

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