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Synchronous circuit processing method by master spare low-order pointer

A pointer and frame synchronization technology, applied in electrical components, multiplex communication, time division multiplex system, etc., can solve the problem that low-level pointer processing circuit switching cannot guarantee no error

Inactive Publication Date: 2006-08-16
FENGHUO COMM SCI & TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] The present invention solves the problem that in the prior art, the switching of active and standby low-order pointer processing circuits cannot guarantee no error code generation

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  • Synchronous circuit processing method by master spare low-order pointer
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  • Synchronous circuit processing method by master spare low-order pointer

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Embodiment Construction

[0014] In the existing synchronous digital series system (SDH), the main and standby low-level pointer processing modules are independent of each other. When the external conditions are completely consistent, the power-on time of the main and standby low-level pointer processing modules cannot be guaranteed to be completely consistent. The pointer processing modules do not transmit control information of low-level pointer adjustment events to each other, and it cannot be guaranteed that the pointer adjustment events output by the main and standby low-level pointer processing modules are exactly the same. When the system needs to switch the low-level pointer processing modules due to failure, The pointer values ​​sent by the low-level pointer processing module are not necessarily the same, and low-level errors may occur.

[0015] This method can make the main and standby low-level pointer processing modules do not generate low-level errors when the system needs to switch the low-le...

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Abstract

The method includes: the low order pointer processing module working at main state makes module multi-frame count; when the multi-frame count value accords with the desired multi-frame count value, the indication of multi-frame count is sent out; the low order pointer processing module at standby state uses the received signal of multi-frame count indication to synchronize the its internal multi-frame count, and then to synchronize the low order read-write address of low order pointer processing module at main state. The invention solves the problem that is there are error codes generated when switch is made between the main low order pointer processing circuit and the standby low order pointer processing circuit.

Description

Technical field [0001] The present invention relates to a method for synchronizing main and standby low-level pointer processing circuits in a synchronous digital series system. The method also relates to other systems where the main and standby same functional modules need to be synchronized. Background technique [0002] In the synchronous digital series system (SDH), the key functional modules are designed as 1+1 redundancy backup, such as high-level cross-connect modules, low-level pointer processing modules, low-level cross-connect modules, and so on. Among them, the standby high-level cross-connect modules, low-level pointer processing modules, and low-level cross-connect modules are always in a hot backup state. In principle, once one of the main high-level cross-connect modules, low-level pointer processing modules, and low-level cross-connect modules fails, the system should be able to automatically switch to the standby module without errors. [0003] For the increasing...

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Application Information

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IPC IPC(8): H04J3/06
Inventor 盛朝阳魏明张艳辉钟山黄蕾
Owner FENGHUO COMM SCI & TECH CO LTD