Method for improving silicon scraps contamination when back grinding

A technology for silicon shavings and contamination, which is applied in the manufacture of electrical components, semiconductor/solid-state devices, circuits, etc. It can solve the problems of easy glue residue and inability to significantly improve contamination, and achieve the effect of solving the problem of contamination

Inactive Publication Date: 2009-04-01
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to geometrical dimensions, especially the existence of silicon wafer V-notch, etc., in some practical applications, it is found that even a thicker adhesive layer cannot significantly improve the occurrence of contamination.
And the use of thick glue layer also faces the risk of glue residue

Method used

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  • Method for improving silicon scraps contamination when back grinding
  • Method for improving silicon scraps contamination when back grinding
  • Method for improving silicon scraps contamination when back grinding

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0019] The main steps related to the polyimide layer and grinding are as follows:

[0020] PECVD (Plasma Enhanced Chemical Vapor Deposition) deposition of silicon oxynitride → photolithography → passivation layer etching → polyimide coating → photolithography → polyimide baking → back grinding → appearance examine. During the polyimide photolithography, the alignment notch that is prone to contamination by silicon shavings is not exposed, and the polyimide in this area is reserved.

[0021] Such as Figure 5 As shown, the polyimide layer photoresist plate of this product contains 2 X 2 photoresist field of view (Shot), each photoresist field size is 20.44mm X 21.84mm, which contains 98 (14 lines in the Y direction, 7 columns in the X direction) chip (chip). In order to reduce the impact on the effective chip, when exposing the coverage alignment notch area, by adjusting the Mask blade (lithographic plate cutting edge) parameter, the Shot is not exposed to the 4.7mm wide are...

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Abstract

This invention discloses a sort of method which improves that it produces the contamination of the silicon swarf in the rear cut. it realizes the obvious betterment action to cut the contamination in the instance that it doesn't increase the cost and the craftwork step. It consists that it improves the photolithographic working procedure of the polyimide in the cut, namely it doesn't expose to the surrounding area of the alignment gap which occurs the contamination of the silicon swarf easily by the precision alignment exposition in the photoengraving of the polyimide in order to reserve the polyimide in this area.

Description

technical field [0001] The invention relates to a method for improving silicon dust contamination during back grinding. Background technique [0002] With the continuous shrinking of the size of semiconductor chips, the requirements for the thickness of the silicon wafers are getting thinner and thinner in the subsequent packaging. At present, the thickness of the chips packaged into the smart card is only about 160um, and the silicon wafers need to be thinned by backside grinding. This has become a very common method. [0003] When doing back grinding, it is necessary to attach a protective film to the surface of the silicon wafer to protect the surface from damage during mechanical grinding on the back. Such as figure 1 As shown, when grinding the backside 1 of the silicon substrate, the surface 2 of the silicon wafer is attached with a protective film 3 and loaded onto the grinding disc 5, and the grinding wheel 6 processes the backside of the silicon wafer from top to ...

Claims

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Application Information

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Patent Type & AuthorityPatents(China)
IPC IPC(8): G03F7/20H01L21/00
Inventor仓凌盛施灵峰
OwnerSHANGHAI HUAHONG GRACE SEMICON MFG CORP