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Cache efficient rasterization of graphics data

A high-speed buffering and memory technology, applied in image data processing, 3D image processing, instruments, etc., can solve problems such as inefficiency

Active Publication Date: 2011-09-14
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Typically, however, the rasterization process is implemented in an inefficient manner in which large amounts of graphics data need to be transferred from the storage device to the cache memory
This is due to the fact that conventional rasterization methods do not maximize the transfer of graphics data to the cache memory - where most or all of the graphics data transferred to the cache memory is when more graphics data is required from the storage device before rasterizing

Method used

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  • Cache efficient rasterization of graphics data
  • Cache efficient rasterization of graphics data
  • Cache efficient rasterization of graphics data

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Embodiment Construction

[0024] In the following description, for purposes of explanation, numerous details are set forth. However, one skilled in the art will recognize that the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order not to obscure the description of the present invention with unnecessary detail.

[0025] Process graphics data depicting an image for rasterization. Blocks of graphics data (pixel arrays) are analyzed in a "Z" pattern order based on a binary search subdivision process to determine a rasterization order for each sub-block (sub-pixel array) of the image. In some embodiments, the length of the sides of the blocks and sub-blocks in pixels is a power of two. The technique determines the analysis order for each sub-block of the image using a recursive processing technique (a binary search subdivision process) that recursively divides a sub-block into further sub-blocks ...

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Abstract

The present invention provides a cache stores data for use in rasterizing graphics data. The size of the cache is equal to a selected tile size. A processor performs the rasterization of the graphics image by subdividing the graphics image into a plurality of sub-blocks. The sub-blocks are processed, based on a block processing order, by further subdivision of the sub-blocks into tiles for those sub-blocks that have graphics image data. The tiles have a size equal to the selected tile size. Data, associated with a tile, is loaded into the cache, and the cache data is utilized to generate pixels for the associated tile of the graphics image.

Description

technical field [0001] The present invention relates to a method and apparatus for cache-efficient rasterization of graphics data. Background technique [0002] To prepare graphics for display or printing, graphics data is rasterized to convert the graphics data into an array of pixels (bitmap) that is then used to display or print the graphics. figure 1 A conceptual diagram of an environment 100 in which rasterization is performed is shown. Environment 100 includes microprocessor (MPU) 105 , storage device 110 , cache memory 115 , frame buffer 120 , and output device 125 . [0003] MPU 105 may comprise the central processing unit (CPU) of a host computer (such as a desktop or laptop computer, server, game console, cellular phone, etc.), or as a graphics device specifically dedicated to graphics creation ( such as a graphics accelerator) or a portion of a digital signal processing (DSP) unit customized to implement digital signal processing algorithms. The storage device ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/60G06T11/40G06T15/40
CPCG06T1/60G06T11/40
Inventor 阿列克谢·V·布尔德舒艾卜·乌丁·艾尔沙德
Owner QUALCOMM INC