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Four-value heat-insulating dynamic D trigger

A flip-flop, adiabatic technology, applied in pulse generation, electrical components, generating electrical pulses, etc., which can solve problems such as limited power consumption savings

Inactive Publication Date: 2011-02-09
NINGBO UNIV
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  • Abstract
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Problems solved by technology

[0003] At present, the existing multi-valued flip-flops mainly use redundant suppression technology and double-edge trigger technology to increase the speed of multi-valued logic systems and reduce the power consumption of integrated circuits. However, these technologies still use the traditional CMOS circuit DC power supply mode, and the total energy It is converted in an irreversible form of electrical energy to heat energy, and its power consumption savings are very limited

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Embodiment Construction

[0034] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0035] Since the adiabatic circuit breaks through the limitations of the traditional CMOS circuit energy transmission mode, the circuit energy is converted from power supply→signal node→ground one-time consumption to power supply→signal node→power recycling, which can effectively recover the charge stored in the node capacitance , so as to greatly reduce energy loss and improve the reliability of circuit operation; at the same time, due to the power relationship between four-valued logic and binary logic, its circuit compatibility is strong and it is convenient for practical application. Therefore, the present invention proposes a four-valued adiabatic dynamic D flip-flop through research on the clock-controlled adiabatic technology and the multi-threshold MOS tube control technology.

[0036] A four-value adiabatic dynamic D flip-flop of the ...

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Abstract

The invention discloses a four-value heat-insulating dynamic D trigger. The D trigger comprises a character computing circuit, a character sampling circuit and a logic signal generating circuit, wherein the character computing circuit mainly comprises first, second, third and fourth sub-character computing circuits; and the logic signal generating circuit mainly comprises a 0-3 logic signal generating circuit and a 1-2 logic signal generating circuit. The trigger is characterized in that: the four-value heat-insulating dynamic D trigger designed through clocked heat insulation technology and multi-threshold MOS tube control technology mainly comprises the character computing circuit and the logic signal generating circuit; and the logic signal generating circuit is controlled by the character computing circuit to generate a four-value logic signal. The circuits of the D trigger sample the input signal through a clocked NMOS tube, and the output load realizes assignment and energy through a sampling value, the bootstrap-operated NMOS tube and a follow power clock with a cross storage type structure. The D trigger effectively reduces the power consumption and improves working reliability of the circuit on the premise of guaranteeing the correct logic function of the circuits.

Description

technical field [0001] The invention relates to a D flip-flop, in particular to a four-value adiabatic dynamic D flip-flop. Background technique [0002] Multi-valued flip-flops are widely used sequential circuits in multi-valued logic systems. It not only reduces the number of input and output leads, reduces production costs, but also increases the information density of integrated circuits. Speed ​​up data processing. [0003] At present, the existing multi-valued flip-flops mainly use redundant suppression technology and double-edge trigger technology to increase the speed of multi-valued logic systems and reduce the power consumption of integrated circuits. However, these technologies still use the traditional CMOS circuit DC power supply mode, and the total energy It is converted from electrical energy to thermal energy in an irreversible form, and its power consumption savings are very limited. Therefore, the study of low-power multi-valued flip-flops has practical s...

Claims

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Application Information

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IPC IPC(8): H03K3/012
Inventor 汪鹏君高虹
Owner NINGBO UNIV
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