Storage control device, storage device, and control method for controlling storage control device

Abstract

A storage control device is disclosed including a write block and a read block. The write block establishes a high-speed access data count. If a plurality of data are to be written to high- and low-speed access storage blocks, the write block writes as many data as the high-speed access data count from among the plurality of data to the high-speed access storage block as high-speed access data while writing the remaining data to the low-speed access storage block as low-speed access data. If the plurality of data written to the low- and high-speed access storage blocks are to be read, the read block issues a request to the high-speed access storage block to read the high-speed access data and a request to the low-speed access storage block to start reading the low-speed access data after the high-speed access data have been read.

Description

technical field [0001] The present disclosure relates to storage control devices. More specifically, the present disclosure relates to a storage control device that controls two memory blocks having different access times, a storage device, and a control method for controlling the storage control device. Background technique [0002] In the past, some storage devices combining two memory blocks with different access times constitute high-capacity storage devices with reduced access time (latency). For example, a flash memory is used as one storage block with a short access time (low latency), and a hard disk drive (HDD) is used as another storage block with a longer access time (high latency). In another example, NVRAM (Non-Volatile Random Access Memory) is used as a low-latency memory block, and Flash memory is used as a high-latency memory block. In the case of combining memory blocks with different access times, low-latency memory blocks generally have a smaller capacit...

AI Technical Summary

Problems solved by technology

In the case of combining memory blocks with different access times, low-latency memory blocks usually have a smaller capacity than high-latency memory blocks, because low-latency memory blocks usually cost more per unit capacity than high-latency memory blocks

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