A high-speed data acquisition and transmission device

Abstract

The invention discloses a high-speed data acquisition and transmission device, which comprises a programmable logic device data acquisition module, an RAM (Random Access Memory) reading and writing coordination control module, a communication module and an Ethernet data transmission module, wherein the programmable logic device data acquisition module is used for high-speed acquisition and buffer; the RAM reading and writing coordination control module is used for high-speed buffer and reading of programmable logic device control data and is used for reading data of a certain data length from an RAM and buffering in a programmable logic device when a single-chip microprocessor has a data request; the communication module is used for realizing communication of the programmable logic device and the single-chip microprocessor and realizing reading of data between the single-chip microprocessor and the programmable logic device by a pair of backward stage FIFO (First Input First Output) and SPI (Single Program Initiation) communication of ping-pong operation; and the Ethernet data transmission module is used for optimizing a UIP (Universal Interface Processor) protocol stack, acquiring data quantity which is easy for IP (Internet Protocol) sub-packet transmission, simplifying a data transmission process into a copy packet header and indirectly reading the data cached in the RAM to the network buffer region through the programmable logic device. According to the high-speed data acquisition and transmission device, high-speed AD (Analog Digital) acquisition is realized, the copy frequency for uploading the data to Ethernet is reduced, and the problem of low CPU (Central Processing Unit) utilization rate is solved.

Description

technical field

[0001] The present invention relates to the technical field of signal acquisition, and more specifically, to a high-speed data acquisition and transmission device. Background technique

[0002] In the field of signal acquisition, especially high-speed data acquisition technology, the system requires high sampling rate, high acquisition accuracy, and large data transmission volume. Therefore, the acquisition speed of the system, the transmission of data, and the storage of data have become the key problems that must be overcome in system construction. For the acquisition and processing of high-speed and large-scale data, using FPGA as the acquisition buffer of the front-end data of the single-chip microcomputer is a method commonly used at home and abroad. A typical video acquisition system, such as a video acquisition and processing system based on FPGA and ARM, uses FPGA to collect image data and send it to a compression chip for compression, ARM reads the ...

Examples

Embodiment Construction

[0018] The present invention will be further described below in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0019] According to an instantiation of the present invention, the device for high-speed data collection and transmission includes,

[0020] The present invention is a high-speed data acquisition and transmission device based on a programmable logic device + a single-chip microcomputer, and realizes single-channel or multi-channel high-speed AD data acquisition through the FPGA and writes them into the external RAM in order to realize data buffering. Read data of a certain length into FIFO No. 0 of FPGA. When the upper computer has a request and the Ethernet needs to send data, at this time the single-chip microcomputer judges whether the No. 0 FIFO for buffering external RAM data has data through the FPGA control signal line. If there is no data, it will not send it. The MCU reads the data through ...

technical field

[0001] The present invention relates to the technical field of signal acquisition, and more specifically, to a high-speed data acquisition and transmission device. Background technique

[0002] In the field of signal acquisition, especially high-speed data acquisition technology, the system requires high sampling rate, high acquisition accuracy, and large data transmission volume. Therefore, the acquisition speed of the system, the transmission of data, and the storage of data have become the key problems that must be overcome in system construction. For the acquisition and processing of high-speed and large-scale data, using FPGA as the acquisition buffer of the front-end data of the single-chip microcomputer is a method commonly used at home and abroad. A typical video acquisition system, such as a video acquisition and processing system based on FPGA and ARM, uses FPGA to collect image data and send it to a compression chip for compression, ARM reads the ...

Examples

Embodiment Construction

[0018] The present invention will be further described below in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0019] According to an instantiation of the present invention, the device for high-speed data collection and transmission includes,

[0020] The present invention is a high-speed data acquisition and transmission device based on a programmable logic device + a single-chip microcomputer, and realizes single-channel or multi-channel high-speed AD data acquisition through the FPGA and writes them into the external RAM in order to realize data buffering. Read data of a certain length into FIFO No. 0 of FPGA. When the upper computer has a request and the Ethernet needs to send data, at this time the single-chip microcomputer judges whether the No. 0 FIFO for buffering external RAM data has data through the FPGA control signal line. If there is no data, it will not send it. The MCU reads the data through ...

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