Decoding method and system of BCH codes

A technology of BCH code and decoding system, applied in the direction of cyclic code, error correction/detection using linear code, error correction/detection using block code, etc., can solve the problem that combinational logic is difficult to meet the clock requirements

Active Publication Date: 2014-04-30
SHENZHEN YILIAN INFORMATION SYST CO LTD
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Problems solved by technology

The IBM (Inversionless Berlecamp-Massey, Berlecamp-Massey algorithm without inversion operation) algorithm is usually used in the hardware implementation of the error position polynomial, and the hardware overhead of the IBM algorithm will increase greatly with the increase of its error correction capability. And its combinational logic will become more and more difficult to meet the clock requirements, so how to optimize IBM's hardware structure becomes very important

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  • Decoding method and system of BCH codes
  • Decoding method and system of BCH codes
  • Decoding method and system of BCH codes

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[0040] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0041] Such as figure 1 As shown, a BCH code decoding system 100 of the present invention includes a syndrome acquisition module 10, an error position polynomial generation module 20 and a money search module 30,

[0042] Syndrome acquisition module 10 is used to perform syndrome operation on received BCH codes to obtain syndrome polynomials. Specifically, the adjoint calculation module is used to calculate the received code R(x), and obtain the adjoint polynomial S(x)={S 0 ,S 1 ... S 2t-1}, where the variable X is an element on the finite field expansion field, t is the maximum number of error...

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Abstract

The invention belongs to the field of error correction decoding, and provides a decoding method and system of BCH codes. The decoding method of the BCH codes comprises the steps that syndrome operation is carried out on the received BCH codes to obtain a syndrome polynomial, values of the syndrome polynomial are calculated successively through a parallel iterative decoding circuit on the basis of a BM algorithm without inverse operation so that error location polynomial coefficients and an error location polynomial can be obtained, the root of the error location polynomial is calculated through a Chien search method, and the error location is obtained through calculation. According to the step that the error location polynomial coefficients and the error location polynomial can be obtained through successive calculation of the parallel iterative decoding circuit, the iteration time of the parallel iterative decoding circuit and the calculation time of the Chien search method are matched, and multiplexing is carried out on the parallel iterative decoding circuit according to the iteration time. Therefore, according to the decoding method and system of the BCH codes, the number of adders, the number of multipliers and the number of registers for hardware implementation can be effectively reduced, complexity of combinational logic is reduced, and the size of a chip can be effectively reduced.

Description

technical field [0001] The present invention relates to the field of error correction decoding, and more specifically relates to a BCH code decoding method and system. Background technique [0002] BCH (Bose-Chaudhuri-Hocquenghem) code, as an important error correction coding method, has been widely used in the field of communication and consumer electronics. The BCH decoder includes three steps, the first is the adjoint calculation, the second step is to calculate the error position polynomial, and the third step is to search for the error position and correct it. The IBM (Inversionless Berlecamp-Massey, Berlecamp-Massey algorithm without inversion operation) algorithm is usually used in the hardware implementation of the error position polynomial, and the hardware overhead of the IBM algorithm will increase greatly with the increase of its error correction capability. And its combinational logic will become more and more difficult to meet the clock requirements, so how to...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/15
Inventor 郭超
Owner SHENZHEN YILIAN INFORMATION SYST CO LTD
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