A Timing Method of Dynamic Binary Translation Instruction Set Simulator

Abstract

The invention relates to a timing method for a dynamic binary translation instruction set simulator. According to the method, through effectively dividing basic blocks, the occupied instruction cycles when the basic blocks execute every time can be confirmed in the stage of dynamic translation, so that the simulator can be accurately timed. The timing process comprises the following steps: (1) a jump instruction, a branch instruction and a memory access instruction are used as the dividing basis of the basic blocks; (2) the cycles of translated instructions and the size of memory latency of a memory area in which the translated instructions are located are calculated in the process of the dynamic translation, so that the occupied instruction cycles when the basic blocks execute every time can be confirmed in the stage of dynamic translation; (3) when the simulator executes code translation, the basic blocks are used as a unit to judge the response time of real-time events. Through the adoption of the method, the real-time events can be responded in time, the strong real-time requirement of aerospace embedded software can be satisfied, and at the same time, since the response time of the real-time events does not need to be judged by instructions, the timing overhead is smaller.

Description

technical field [0001] The invention relates to a timing method for a dynamic binary translation instruction set simulator, which belongs to the field of embedded software. Background technique [0002] The instruction set simulator is used to simulate the whole system of the target computer's CPU instruction set, interrupt controller, peripherals, etc. at the software level, so that the software can run on computers with different architectures without any modification. [0003] For the instruction set simulator running aerospace embedded software, because the software has high requirements for real-time performance, it is not only required that the simulator can correctly simulate the execution results of instructions, but also provide instruction timing functions, and the timing accuracy can meet Software requirements for real-time performance. [0004] The timing function of the instruction set simulator is realized by counting the number of clock cycles required for th...

AI Technical Summary

Problems solved by technology

This requires the simulator to judge before running to a basic block. Assuming that the current simulator has simulated running time S, before executing the basic block, it needs to judge whether (S+T) is less than or equal to D. Only the condition The translation code of the basic block can only be executed when it is satisfied, otherwise the event E cannot be processed in time

[0027] However, since this basic block contains ld and st instructions, and the accessed memory area may change during runtime, the value of T is an unknown number, which will make it difficult for the simulator to judge the real-time value before executing the basic block translation code. Event response time

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