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Time slot switching device and method based on FPGA

A technology of time slot exchange and time slot, which is applied in the field of communication and can solve the problem that only a specific rate of exchange can be completed.

Active Publication Date: 2014-12-24
BANGYAN TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, many time slot exchanges are based on E1 channels, that is, 2.048Mbps communication links are used, which are divided into 32 time slots, and each interval is 64Kbps. However, this time slot exchange only supports service access at a specific rate and can only complete exchange at a specific rate

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  • Time slot switching device and method based on FPGA
  • Time slot switching device and method based on FPGA
  • Time slot switching device and method based on FPGA

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Embodiment Construction

[0045] It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

[0046] The invention provides a time slot exchange device based on FPGA.

[0047] Reference figure 1 with figure 2 , figure 1 It is a schematic structural diagram of an embodiment of an FPGA-based time slot exchange device of the present invention; figure 2 It is a schematic structural diagram of the configuration module in the FPGA-based time slot exchange device of the present invention.

[0048] The FPGA-based time slot exchange device provided by the present invention includes: a configuration module 10 connected with a peripheral CPU, an upper switching network module 20 for receiving uplink data, a switching network module 30 for time slot switching, and a switching network module 30 for sending downlink data. The lower switching network module 40, wherein, the upper switching network module 20 includes several...

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Abstract

The invention discloses a time slot switching device based on an FPGA. A port configuration unit of a configuration module of the time slot switching device is used for configuring corresponding receiving ports to receive uplink data and configuring corresponding sending ports to send downlink data according to configuration signals of a CPU; an upper switching network module of the time slot switching device processes at least one piece of uplink data, generates one piece of aggregation data and sends the aggregation data to a switching network module; the switching network module of the time slot switching device generates one piece of input time slot data according to the at least one piece of aggregation data, performs time slot switching processing on the input time slot data, generates output time slot data and sends the output time slot data to a lower switching network module; the lower switching network module of the time slot switching device processes the output time slot data, generates corresponding downlink data and distributes the downlink data to the sending ports. The invention further discloses a time slot switching method based on the FPGA. By the adoption of the scheme, service access at multiple rates and aggregation and switching on multiple service ports can be supported.

Description

Technical field [0001] The present invention relates to the field of communication technology, in particular to an FPGA-based time slot exchange device and method. Background technique [0002] In digital telecommunications systems, data is transmitted in a continuous bit stream in time slots. [0003] At present, many timeslot exchanges are based on the E1 channel, that is, the 2.048Mbps communication link is divided into 32 timeslots, and each interval is 64Kbps. However, this kind of timeslot exchange only supports service access at a specific rate. Complete the exchange at a specific rate. Summary of the invention [0004] The main purpose of the present invention is to provide an FPGA-based time slot switching device and method capable of supporting service access at multiple rates and supporting the aggregation and switching of multiple service ports. [0005] In order to achieve the above objective, the present invention provides an FPGA-based time slot switching device, incl...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04Q11/08H04J3/16
Inventor 刘增华
Owner BANGYAN TECH