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Device and method for time slot exchange based on fpga

A technology of time slot exchange and time slot, which is applied in the field of communication and can solve the problem that only a specific rate of exchange can be completed.

Active Publication Date: 2018-05-08
BANGYAN TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, many time slot exchanges are based on E1 channels, that is, 2.048Mbps communication links are used, which are divided into 32 time slots, and each interval is 64Kbps. However, this time slot exchange only supports service access at a specific rate and can only complete exchange at a specific rate

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  • Device and method for time slot exchange based on fpga
  • Device and method for time slot exchange based on fpga
  • Device and method for time slot exchange based on fpga

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Embodiment Construction

[0045] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0046] The invention provides an FPGA-based time slot exchange device.

[0047] refer to figure 1 and figure 2 , figure 1 It is a schematic structural diagram of an embodiment of the FPGA-based time slot exchange device of the present invention; figure 2 It is a schematic structural diagram of configuration modules in the FPGA-based time slot exchange device of the present invention.

[0048] The time slot switching device based on FPGA provided by the present invention includes: a configuration module 10 connected to the peripheral CPU, an upper switching network module 20 for receiving uplink data, a switching network module 30 for time slot switching and a switching network module 30 for sending downlink data The lower switching network module 40, wherein the upper switching network module 20 includes a numbe...

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Abstract

The invention discloses an FPGA-based time slot switching device. The port configuration unit of the configuration module configures the corresponding receiving port to receive uplink data according to the configuration signal of the CPU, and configures the corresponding sending port to send downlink data; At least one uplink data is processed to generate a piece of aggregation data, and the aggregation data is sent to the switching network module; the switching network module generates an input time slot data according to at least one piece of aggregation data, performs time slot exchange processing on the input time slot data, and generates Output time slot data, and send the output time slot data to the lower switching network module; the lower switching network module processes the output time slot data, generates corresponding downlink data, and distributes the downlink data to the sending port. The invention also discloses an FPGA-based time slot exchange method. By adopting the solution disclosed in the present invention, it is possible to support service access of multiple rates and support aggregation and switching of multiple service ports.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to an FPGA-based time slot exchange device and method. Background technique [0002] In digital telecommunication systems, data is transmitted as a continuous bit stream in time slots. [0003] At present, many time slot exchanges are based on E1 channels, that is, 2.048Mbps communication links are used, which are divided into 32 time slots, and each interval is 64Kbps. However, this time slot exchange only supports service access at a specific rate and can only Complete the exchange at a specific rate. Contents of the invention [0004] The main purpose of the present invention is to provide an FPGA-based time slot switching device and method capable of supporting service access of multiple rates and convergence switching of multiple service ports. [0005] In order to achieve the above object, the present invention provides a time slot exchange device based on FPGA, com...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04Q11/08H04J3/16
Inventor 刘增华
Owner BANGYAN TECH