Successive approximation register analog to digital converter (SAR ADC) and switching method during analog-digital conversion thereof

An analog-to-digital converter, successive approximation technology, applied in the field of analog-to-digital converter and analog-to-digital conversion, successive approximation analog-to-digital converter and its switching during analog-to-digital conversion, can solve the waste of chip area and poor economic benefits High, increased dynamic power consumption and other issues

Active Publication Date: 2016-03-09
江苏芯力特电子科技有限公司
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AI Technical Summary

Problems solved by technology

[0003] SARADC usually adopts a charge redistribution structure. Since the total unit capacitance of the capacitive successive approximation analog-to-digital converter is exponentially related to the ADC accuracy, for a higher-precision SARADC, the total capacitance and chip area will increase sharply. Switching capacitors The dynamic power con

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  • Successive approximation register analog to digital converter (SAR ADC) and switching method during analog-digital conversion thereof
  • Successive approximation register analog to digital converter (SAR ADC) and switching method during analog-digital conversion thereof
  • Successive approximation register analog to digital converter (SAR ADC) and switching method during analog-digital conversion thereof

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Embodiment Construction

[0064] Below in conjunction with accompanying drawing of description, the present invention will be further described.

[0065] Such as figure 1 and figure 2 As shown, a successive approximation analog-to-digital converter includes a multi-reference generation circuit 1, a capacitor array digital-to-analog converter 2, a comparator 3 and a successive approximation control logic 4, and the capacitor array digital-to-analog converter 2 includes and compares The non-inverting terminal capacitor array connected to the non-inverting input terminal of the comparator 3 and the inverting terminal capacitor array connected to the inverting input terminal of the comparator 3.

[0066] Such as figure 2 As shown, the multi-reference generating circuit 1 is used to input a reference voltage Vref to generate a common mode voltage Vcm, a quarter of the reference voltage Vref / 4 and a three-quarter reference voltage of 3Vref / 4, including a first switch SW and eight equal-resistance resist...

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Abstract

The invention discloses a successive approximation register analog to digital converter (SAR ADC) and a switching method during analog-digital conversion thereof. The SAR ADC comprises a multi-reference generating circuit, a capacitor array digital-to-analog converter (DAC), a comparator and successive approximation control logic. The capacitor array DAC may comprise couple capacitors with binary coding bits of N-3 which are 3 less than the binary coding bits of N outputted by the SAR ADC, the capacitors with N-3 bits can achieve excellent effects of resolution of N bits, the capacitor array area can be effectively reduced, the total number of unit capacitors can be reduced by 87.5%, therefore, the circuit complexity is reduced, the manufacturing cost is saved, and the small size is satisfied. With the switching method provided by the invention, in the switching process, no energy is consumed for the first two comparisons and afterwards, the amount of power consumption for each comparison is less than that of a traditional structure; and compared with the traditional structure, the invention can save up to 99.4% of an average amount of dynamic power consumption in the switching, thereby reducing the overall power consumption.

Description

technical field [0001] The invention relates to an analog-to-digital converter and an analog-to-digital conversion method, in particular to a successive approximation analog-to-digital converter and a switching method during analog-to-digital conversion, belonging to the technical field of analog or digital-analog hybrid integrated circuits. Background technique [0002] The successive approximation analog-to-digital converter (SuccessiveApproximationRegisterAnalogtoDigitalConverter, SARADC) is a medium-to-high-precision and medium-speed analog-to-digital converter. Its advantages are low power consumption and small area. It is often used in radar, communication, image sensing and mobile phones. Touch screen and other fields. [0003] SARADC usually adopts a charge redistribution structure. Since the total unit capacitance of the capacitive successive approximation analog-to-digital converter is exponentially related to the ADC accuracy, for a higher-precision SARADC, the to...

Claims

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Application Information

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IPC IPC(8): H03M1/38
Inventor 张文杰李彬谢亮金湘亮
Owner 江苏芯力特电子科技有限公司
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