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Power-On Body Biasing Circuits and Methods

A body bias and circuit technology, applied in circuits, electronic switches, electrical components, etc., can solve problems such as damage to IC devices, and achieve the effects of avoiding latch-up, effective generation, and effective body bias voltage.

Active Publication Date: 2018-12-11
MIE FUJITSU SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The disadvantage of implementing a body-bias circuit is that it requires tight control of the body voltage during transients when powering up the IC device
If the bulk voltage level is not tightly controlled, the p-n junction formed by the body of the transistor can be forward biased, which can draw a large amount of current that can damage the IC device
Also, the initial floating state of the transistor body can lead to a latch-up situation (activation of a parasitic BJT)

Method used

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  • Power-On Body Biasing Circuits and Methods
  • Power-On Body Biasing Circuits and Methods
  • Power-On Body Biasing Circuits and Methods

Examples

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Embodiment Construction

[0044] Various embodiments of the present invention will be described below in conjunction with multiple drawings. Embodiments illustrate circuits, integrated circuit (IC) devices, and methods for controlling body bias voltage during power-up operations that can reduce current spikes and / or latch-up. Power-up operations may include dynamic power-up and power-down when the supply voltage begins to rise, including when the device starts to power up, resets, encounters a power outage event, or is powered down for power saving purposes, to name a few. An example only) of those operations.

[0045] In the following embodiments, similar items are denoted by the same reference numerals, the first digits corresponding to the figure numbers.

[0046] Figure 12A is a graphical representation of a body-biased complementary MOS transistor in an IC device. IC device 1200 may include a p-channel transistor P120 having a source connected to a high power supply voltage (VDD) and a body re...

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PUM

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Abstract

A powered body bias circuit and method, wherein the device may include at least a first body bias circuit configured to generate a first body bias voltage different from a power supply of the integrated circuit device voltage; at least a first bias control circuit configured to set a first body bias node to a first supply voltage and subsequently cause the first body bias node to be set to the first body bias voltage; and a plurality of first transistors having bodies connected to said first body-bias node. With the apparatus and methods of the present disclosure, body bias voltages can be generated more efficiently than conventional methods.

Description

technical field [0001] The present invention relates generally to transistor body biasing circuits for integrated circuit devices, and more particularly to body biasing circuits for establishing a body bias voltage after power-up of such devices. Background technique [0002] An integrated circuit (IC) device may include a plurality of transistors, such as insulated gate field effect transistors (hereinafter referred to as MOS-type transistors, but without implying any particular gate or gate insulating material). A MOS type transistor may include a gate, a drain, a source and a body. In some IC devices or some circuits with IC devices, the body of the transistor is fixedly connected to the supply voltage. For example, the body of a p-channel MOS transistor is connected to a high supply voltage (eg, VDD), while the body of an n-channel transistor is connected to a low supply voltage (eg, VSS) [0003] However, in other IC devices or circuits with IC devices, the body of th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K17/687H03K17/16
CPCH01L29/7851G05F3/205
Inventor E·J·博林
Owner MIE FUJITSU SEMICON