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ip module synthesis method of layout

A synthesis method and layout technology, applied in the field of intellectual property module synthesis, can solve the problems of taking a lot of time for synthesis and inspection, unable to guarantee the correctness of manual processing and visual inspection, etc., so as to reduce manual errors and improve work efficiency.

Active Publication Date: 2018-08-21
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It can be seen that the existing method requires visual confirmation and manual splicing, and requires the use of layout tools to convert layout data into layout, which requires a lot of time and effort for data synthesis and inspection. The correctness of manual processing and visual inspection cannot be guaranteed

Method used

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Embodiment Construction

[0027] Such as figure 2 As shown, it is a flow chart of the IP module synthesis method of the layout of the embodiment of the present invention, and the IP module synthesis method of the layout of the embodiment of the present invention includes the following steps:

[0028] Step 1: Parse the input layout data, and output the names of all cells (Cell) in the layout data to set A. The cells in the layout data include a top-level cell (top-cell) and each sub-cell (sub-cell), output a set A according to the Cell name (name), and the content is Cell ID, such as A1, A2, A3, A4,... , An.

[0029] Step 2: Extract the names of all IP module data in the IP module database to integration B.

[0030] Preferably, the IP module (Module) name or IP design kit (designkits) name information can be extracted from the form provided by the customer, and the content is saved as a set B, and the Cell IDs are B1, B2, B3, B4,...,Bn ; That is, the set B includes all the IP modules required in the...

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Abstract

The invention discloses an IP module merging method of a layout. The IP module merging method comprises the following steps: analyzing input layout data, and outputting names of all units in the layout data into a set A; extracting names of all IP module data in an IP module database in a set B, and outputting all same elements in the sets A and B to form a set C; taking the IP module data corresponding to the names of various elements in the set C as the IP module data to be merged, and obtaining all absolute paths of the IP module data to be merged according to matching of metal level information of the layout data and unit names of various elements in the set C; and invoking various IP module data according to the absolute paths, and automatically merging the invoked IP module data into the layout data. According to the invention, automatic merging of the IP module data of the layout can be realized; furthermore, automatic detection can be carried out; and the working efficiency and the merging correctness can be greatly increased.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a method for merging intellectual property (Intellectual Property, IP) modules. Background technique [0002] An IP module is a pre-designed or even verified integrated circuit, device or component with certain functions. Most of the customer's chip data, that is, the layout data, will call the IP module independently developed by the manufacturer (Foundary), and the layout data used by the client needs to synthesize the IP module. Only the physical library exchange format file (Library exchange format, LEF), LEF mainly defines the physical information of the unit module, such as the size of the unit area, geometric shape, wiring layer and other physical information. The unit module has no internal circuit, and the unit module that needs to synthesize the IP module is equivalent to an IP with only connection information but no internal circuit. b...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
CPCG06F30/392
Inventor 张燕荣张兴洲
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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