Random neural network hardware realization apparatus

A stochastic neural network, hardware implementation technology, applied in the direction of biological neural network model, physical realization, etc., can solve the problems of low accuracy of neural network, complex model, etc.

Active Publication Date: 2016-11-16
SHANGHAI UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The object of the present invention is to provide a random neural network hardware implementation device with high precision, good real-time performance and fault tolerance, aiming at the defects of low precision and complex models of the above-mentioned neural network.

Method used

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  • Random neural network hardware realization apparatus
  • Random neural network hardware realization apparatus

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Embodiment 1

[0038] refer to figure 1 , image 3 , Figure 5 with Figure 7 , a schematic diagram of a system design of a random neural network hardware implementation device in a preferred embodiment of the present invention, which includes a three-layer structure-input layer, hidden layer and output layer: the input layer consists of m input neurons I Each input neuron I includes a random number converter A, the input vector (1) outputs a random data sequence 1 (2) after passing through the random number converter A; the hidden layer is composed of s hidden neurons J, Each hidden neuron J includes a random number converter B, a random function generator (41) and a definite number converter C, and the parameter code stream 1 (11) is combined with the random data sequence 1 after passing through the random number converter B (2) pass through the random function generator (41) together to obtain the random data sequence two (13), the random data sequence two (13) passes through the defin...

Embodiment 2

[0040] refer to figure 2 It is a schematic structural diagram of a random neural network hardware implementation device in a preferred embodiment of the present invention. The neural network includes m input neurons I, s hidden neurons J, and n output neurons K. The number of neurons in each layer is set according to different application situations. There is an optimal number of input layer nodes m and The number of hidden layer nodes s makes the network structure have higher calculation accuracy. Input neuron I accepts input vector (1), and outputs random data sequence one (2) through random number converter A; hidden neuron J accepts random data sequence one (2), parameter code stream one (11), see The digital stream one (11) passes through the random number converter B to obtain the random code stream sequence (12), the random code stream sequence (12) and the random data sequence one (2) and input them to the random function generator (41) to obtain the random data sequ...

Embodiment 3

[0043] This embodiment is basically the same as Embodiment 1, and the special features are as follows:

[0044] The random neural network hardware realization device also includes parameter code stream one (11) and parameter code stream two (21), both of which are stored in a non-volatile memory. Among them, the parameter code stream one (11) participates in the calculation of the output value of the hidden neuron J (13), the parameter code stream two (21) participates in the calculation of the output value of the output neuron K (23), and the parameter code stream one (11) Can be a random sequence or a non-random sequence. When the parameter code stream one is a non-random sequence, the random neural network hardware implementation device further includes a random number converter B for converting the parameter code stream one (11) into a random sequence. Parameter code stream two (21) can be a random sequence or a non-random sequence. When the parameter code stream two (21...

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Abstract

The invention relates to a random neural network hardware realization apparatus. The apparatus comprises an input layer, a hidden layer and an output layer, wherein the input layer consists of m input neurons I, each input neuron I comprises a random number converter A, and after an input vector passes through the random number converter A, a random data sequence I is output; the hidden layer consists of s hidden neurons J, each hidden neuron J comprises a random number converter B, a random function generator and a definite number converter C, a parameter code stream passes through the random number converter B, is aligned to the random data sequence and passes through the random function generator, so a random data sequence II is obtained, and the random number sequence II passes through the definite number converter C and a definite number I is output; the output layer consists of n output neurons K, each output neuron K comprises a definite number converter D and a linear function processor, and a parameter code stream II passes through the definite number converter D, is aligned to the definite number and passes through the linear function processor, so an object vector is output. According to the apparatus, hardware logic and wiring resources can be greatly reduced, circuit cost and power consumption can be reduced, the network operation precision is high, and the fitting capability of training samples is enhanced.

Description

technical field [0001] The invention relates to a random neural network hardware realization device. The so-called random neural network refers to a network structure in which the input layer and the hidden layer use random numbers to transmit and process data, and the output layer uses deterministic numbers to output. Background technique [0002] Artificial Neural Network (Neural Network for short) is a complex network composed of a large number of simple neurons interconnected by imitating the structure and function of the brain's neural network from the perspective of information processing. Each neuron receives input from a large number of other neurons and produces outputs that affect other neurons through a parallel network. The mutual constraints and mutual influence between the networks realize the nonlinear mapping from the input state to the output state space. The artificial neural network can obtain the weight and structure of the network through training and ...

Claims

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Application Information

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IPC IPC(8): G06N3/06
CPCG06N3/06
Inventor 季渊王雪纯陈文栋冉峰满丽萍
Owner SHANGHAI UNIV
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