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Optimization method and system for lot abnormality handling caused by WAT machine alarm

A technology of exception handling and optimization methods, applied in file systems, digital data processing, special data processing applications, etc., can solve the problem of not being able to know where the lot is tested in real time, affecting the shipping process, cost, etc., to speed up the lot. The effect of the normal shipping process

Active Publication Date: 2017-05-31
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, when an alarm occurs on the WAT (Wafer Acceptance, Wafer Acceptance Test) machine, the lot (a basic batch of wafer groups) stops halfway, and the engineer cannot know immediately at night, and the MFG (Manufacturing, production) will require the equipment to be down ( Shutdown), equipment maintenance machine, the three departments cannot immediately know where the current lot test is going, and at this time the lot cannot continue to test and ship, and engineers must be present to deal with it, and it may even happen during subsequent shipments. Wafer ( Wafer) data is missing, engineers need to re-export the data, merge the data, and re-upload, which takes a lot of time and seriously affects the shipping process

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  • Optimization method and system for lot abnormality handling caused by WAT machine alarm
  • Optimization method and system for lot abnormality handling caused by WAT machine alarm
  • Optimization method and system for lot abnormality handling caused by WAT machine alarm

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Embodiment Construction

[0030] The implementation of the present invention is described below through specific examples and in conjunction with the accompanying drawings, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific examples, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0031] figure 1 It is a flow chart of the steps of the lot abnormal processing optimization method caused by a kind of WAT machine alarm of the present invention, as figure 1 Shown, a kind of WAT machine alarm of the present invention causes the lot abnormal processing optimization method, comprises the following steps:

[0032] Step 101, setting a BAN folder, so that the WAT machine test ...

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Abstract

The invention discloses an optimization method and system for lot abnormality handling caused by a WAT machine alarm. The method comprises the following steps that firstly, a BAN folder is set; secondly, when the WAT machine alarm is given and lot interruption occurs, whether tested data is already sent or not is judged, if the data is already sent, the fourth step is executed, and otherwise, the third step is executed; thirdly, the format of the tested data is converted into a file format under the BAN folder, and then the data is uploaded; fourthly, the BAN folder is updated and sent to a designated engineer to inform the designated engineer of the lot interruption; fifthly, the rest of untested wafers are selected to be tested; sixthly, after retesting, data generated before and after the interruption is merged and automatically uploaded to a server. By means of the method, the issue of lot abnormality handling caused by the WAT machine midway alarm and feed interruption can be effectively solved.

Description

technical field [0001] The invention relates to a lot abnormality processing optimization method and system, in particular to a lot abnormality processing optimization method and system caused by a WAT ​​machine alarm. Background technique [0002] At present, when an alarm occurs on the WAT (Wafer Acceptance, Wafer Acceptance Test) machine, the lot (a basic batch of wafer groups) stops halfway, and the engineer cannot know immediately at night, and the MFG (Manufacturing, production) will require the equipment to be down ( Shutdown), equipment maintenance machine, the three departments cannot immediately know where the current lot test is going, and at this time the lot cannot continue to test and ship, and engineers must be present to deal with it, and it may even happen during subsequent shipments. Wafer ( Wafer) data is missing, engineers need to re-export the data, merge the data, and re-upload, which takes a lot of time and seriously affects the shipping process. Con...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/30
CPCG06F16/16G06F16/172G06F16/1815
Inventor 沈茜娄晓祺
Owner SHANGHAI HUALI MICROELECTRONICS CORP