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Timing sequence monitoring unit and monitoring system oriented to near-threshold low voltage

A monitoring unit and monitoring system technology, applied in the direction of automatic control of electrical components and power, converting continuous pulse trains into pulse train devices with required modes, etc. The circuit is difficult to work correctly, etc., to achieve the effect of increasing frequency, simple structure, and reducing area cost

Active Publication Date: 2018-02-23
SOUTHEAST UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to address the deficiencies of the above-mentioned background technology, to provide a timing monitoring unit and a monitoring system for near-threshold low voltage, and to realize timing monitoring for near-threshold voltage at a lower circuit cost. The monitoring system of the machine, phase-locked loop, and fast clock adjustment module realizes the adaptive adjustment of the system frequency, and solves the problem that the timing monitoring circuit designed for conventional voltage is difficult to work correctly in the near-threshold area and the rare ones that can work in the near-threshold voltage area The technical problem of large area and high cost of timing monitoring unit

Method used

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  • Timing sequence monitoring unit and monitoring system oriented to near-threshold low voltage
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  • Timing sequence monitoring unit and monitoring system oriented to near-threshold low voltage

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Embodiment Construction

[0035] The technical solution of the invention will be described in detail below in conjunction with the accompanying drawings.

[0036] Timing monitoring systems for near-threshold low voltages such as figure 1 , Figure 7 As shown, it includes a timing monitoring group unit 1, a dynamic or gate tree (Dynamic Or-tree) 2, a frequency control state machine 3, a phase-locked loop 4, a fast clock adjustment module 5, and a monitoring window configuration module 6.

[0037] Insert each of the N timing monitoring units in the timing monitoring unit group 1 into the end of the N critical paths, the input of the timing monitoring unit is connected to the input data (that is, the output data of the critical path) and is connected to it when the clock is in a low phase. Whether the timing of the critical path is tense, if the timing is tight, the early warning signal Pre_error will be generated immediately in the monitoring window, correspondingly, a group of timing monitoring units w...

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PUM

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Abstract

The invention discloses a timing sequence monitoring unit and a monitoring system oriented to near-threshold low voltage, relates to an adaptive frequency adjustment technology based on on-chip timingsequence detection, and belongs to the technical field of integrated circuit low-power consumption design. The monitoring unit provided by the invention realizes timing monitoring oriented to near-threshold voltage with relatively lower circuit cost, realizes adaptive adjustment of system frequency through establishment of the monitoring system comprising a frequency control state machine, a phase-locked loop and a fast clock adjustment module, and solves a technical problem that a timing sequence monitoring circuit which is designed in a manner of being oriented to a normal voltage can hardly work correctly in a near-threshold region and rare timing sequence monitoring units which can work in a manner of being oriented to the near-threshold voltage region have large area and needs high cost.

Description

technical field [0001] The invention discloses a timing monitoring unit and a monitoring system for near-threshold low voltage, relates to an adaptive frequency adjustment technology based on on-chip timing detection, and belongs to the technical field of integrated circuit low power consumption design. Background technique [0002] With the gradual shrinking of the integrated circuit (Integrated Circuit, IC) process size, the impact of process, voltage, temperature (Process-Voltage-Temperature, PVT) and other deviations on the circuit will also increase. IC designers usually reserve timing margins to ensure that the chip can work normally even in the worst-case PVT environment. "Worst case" refers to the simultaneous occurrence of various unfavorable factors that negatively affect the timing of the circuit, but in the actual work of the chip, the worst case rarely occurs or even does not occur, which leads to an overly conservative design, resulting in Waste of chip perfor...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/156H03L7/099H03L7/10
CPCH03K5/156H03L7/099H03L7/10
Inventor 单伟伟毕润东肖如吉邵帅
Owner SOUTHEAST UNIV
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