Heterogeneous multi-kernel power capping method through coordination of DVFS and task mapping

A technology of task mapping and nuclear power, applied in the direction of instruments, electrical digital data processing, digital data processing components, etc., can solve problems such as system power consumption and unbalanced load, so as to improve system performance and ensure system performance , The effect of improving system performance

Inactive Publication Date: 2018-03-30
BEIJING UNIV OF TECH
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Problems solved by technology

While using DVFS to limit the power consumption of heterogeneous systems, there will be load imbalance between CPU and GPU
By decomposing a parallel program into tasks that can be executed simultaneously, and map...

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  • Heterogeneous multi-kernel power capping method through coordination of DVFS and task mapping
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  • Heterogeneous multi-kernel power capping method through coordination of DVFS and task mapping

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Embodiment Construction

[0042] The present invention will be further described below in conjunction with the accompanying drawings.

[0043] figure 1 It is a heterogeneous multi-core system built by the gem5-gpu simulator. It simulates a heterogeneous architecture that integrates a 4-core CPU and a GPU composed of 8 CUs on the same chip. In gem5-gpu, you can Modify the simulation architecture flexibly according to the configuration file, and gem5-gpu supports DVFS.

[0044] In the heterogeneous multi-core system constructed by gem5-gpu simulation, the present invention realizes a power capping method by combining DVFS and task mapping, including the following specific steps:

[0045] Step 1, implement measuring the total computing node time, CPU power consumption and GPU power consumption after the execution of the application program is completed.

[0046] In gem5-gpu, after an application is executed, a file stat.txt containing all program execution information will be automatically generated, in...

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Abstract

The invention discloses a heterogeneous multi-kernel power capping method through coordination of DVFS and task mapping. The method comprises the steps that firstly, computational node power consumption, CPU power consumption and GPU power consumption scripts can be measured after program execution is completed for a heterogeneous system, then, selected parallel test benchmark programs are modified for obtaining the execution time of different kernel functions; different frequencies are set for a CPU and a GPU, application programs are operated only on the CPU and the GPU, detailed operation information is obtained and comprises the total execution time, the execution time of each kernel function, computational node power consumption, CPU power consumption and GPU power consumption; on thebasis of the operation information, a predicted model is designed and includes a predicted execution time model and a power consumption model; finally, on the basis of the predicted model, system power consumption and execution time under different CPU frequencies, GPU frequencies and task distribution schemes are obtained to be filled in a configuration table, and according to an improved greedyalgorithm, the best configuration scheme is found. By adopting the heterogeneous multi-kernel power capping method, the system power consumption budget is limited while the system performance can beimproved.

Description

technical field [0001] The invention belongs to the field of computer architecture, and in particular relates to realizing a heterogeneous multi-core power capping method by coordinating DVFS and task mapping. Background technique [0002] After continuous research and development in recent years, the advanced architecture represented by multi-core processors has gradually replaced single-core processors as the main way to improve processor performance. Compared with homogeneous multi-core processors, heterogeneous multi-core platforms can achieve better performance. Power capping is a technique that limits the power consumption of a heterogeneous system to a predetermined level. Power consumption and heat dissipation limit the improvement of heterogeneous multi-core performance. Modern processors are built so that they can suffer from a certain level of power consumption, requiring systems that can achieve a processor power ceiling. The most common power budgeting techni...

Claims

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Application Information

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IPC IPC(8): G06F1/32
CPCG06F1/3203G06F1/324G06F1/3296
Inventor 方娟汪梦萱马傲男程妍瑾常泽清
Owner BEIJING UNIV OF TECH
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