Time synchronization control method, device, system and computer-readable storage medium

Abstract

The invention discloses a time synchronization control method, device and system, and a computer readable storage medium. The method comprises steps that FPGA of an SOE system receives calibration information of a control master station, extracts and analyzes the calibration information, so as to acquire second time information; the FPGA calculates according to the second time information and second reference information, so as to obtain SOE system calibration information; and time synchronization control is performed according to the SOE system calibration information. In the method, the FPGAof the SOE system processes parallelly and calculates through the second time information and the second reference information so as to obtain calibration information of the SOE system to calibrate the clock, so that low time accuracy caused by serial operation is prevented, and data information is synchronized more timely. The invention further provides a time synchronization control device andsystem and a computer readable storage medium, which has the above beneficial effects.

Description

technical field [0001] The present application relates to the technical field of time control, in particular to a time synchronization control method, device, system and computer-readable storage medium. Background technique [0002] With the development of industrialization, industrial automation has continuously improved the accuracy of fault location in power monitoring. [0003] Time synchronization provides a mechanism to determine the sequence of time occurrences, so as to ensure that nodes send and receive messages, control, and accident records are very correct and credible in terms of time logic. Traditional time synchronization schemes such as NTP (Network Time Protocol, Network Time Protocol) have low synchronization accuracy. For a single-domain system, the main history station performs time synchronization through the time correction source as the time correction server, and then sends it to the domain The control master station synchronizes time with the time ...

AI Technical Summary

Problems solved by technology

The operation mode of the processor is serial, and the corresponding work often depends on the workload of one cycle, which will cause the processor to be ahead or lag behind when the clock synchronization work is often not at the agreed time node. At the time node, time errors are caused; NTP time correction sends the time information to the control master station and then forwards it to the time correction slave station, which will artificially introduce time errors, resulting in reduced event resolution

Therefore, it is difficult to meet the requirements of high real-time synchronous data information

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