A method, device and device for preventing flash memory bit error amplification

Abstract

The present invention discloses a method, device and device for preventing flash memory bit error amplification. Wherein, the method includes: performing data transmission between the host computer and the flash memory, and in the process of reading the transmitted data from the buffer to the buffer space inside the flash memory controller, detecting the transmission through the flash memory controller Whether there is a bit error in the data obtained is the detection result, and according to the obtained detection result, correct the bit error data associated with the detection result to obtain correct data, and transmit the correct data to the cache of the flash memory through the flash memory controller in the device. In the above manner, it is possible to avoid a situation in which the bit error of the flash memory is amplified.

Description

technical field [0001] The present invention relates to the technical field of flash memory, and in particular, to a method, apparatus and device for preventing bit error amplification of flash memory. Background technique [0002] With the development of Nand Flash (flash memory) technology, flash memory has developed from SLC (Single-Level Cell, single-level storage unit) solid state drive to QLC (Quad-Level Cell, four-level storage unit) solid state drive, from each storage unit From storing 1Bit (binary digit, bit) data to storing 4Bit data, the probability of occurrence of Bit errors increases, which requires the flash memory controller to have more and more powerful error correction algorithms to ensure the correctness of the data. [0003] However, from the perspective of cost, it is impossible for the flash memory controller to enhance the error correction ability indefinitely, and the controller must also have a certain backward compatibility ability. For the new Na...

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Problems solved by technology

[0005] However, it is precisely because of the absence of the participation of the flash memory controller in this move, and because the bit error probability of the Nand Flash itself is greatly increased, the "read" command inside the Nand Flash reads the data from the storage unit to the internal Register (register) ), this Bit error may occur, and when the internal "programming" command writes these data to another Page, it is equivalent to the original data being wrong, then the data of this Page will be read in the future At the same time, a new bit error may be generated, so that the bit error is amplified

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