Method, device and equipment for preventing flash memory bit error amplification

Abstract

The invention discloses a method, a device and equipment for preventing flash memory bit error amplification. The method comprises the following steps that: carrying out data transmission between theupper computer and the flash memory; in the process of reading the transmitted data from the buffer to the buffer area space in the flash memory controller, detecting whether the transmitted data hasa bit error or not through a flash memory controller to obtain a detection result, performing error correction on bit error data associated with the detection result according to the obtained detection result to obtain correct data, and transmitting the correct data to a buffer of the flash memory through the flash memory controller. By means of the mode, the situation that flash memory bit errorsare amplified can be avoided.

Description

technical field [0001] The invention relates to the technical field of flash memory, in particular to a method, device and equipment for preventing bit error amplification of flash memory. Background technique [0002] With the development of Nand Flash (flash memory) technology, flash memory has developed from SLC (Single-Level Cell, single-layer storage unit) solid-state hard disk to QLC (Quad-Level Cell, four-layer storage unit) solid-state hard disk, from each storage unit From storing 1Bit (binary digit, bit) data to storing 4Bit data, the probability of Bit errors will increase, which requires the flash memory controller to have more and more powerful error correction algorithms to ensure the correctness of data. [0003] However, considering the cost, it is impossible for the flash memory controller to enhance the error correction capability indefinitely, and the controller must also have a certain backward compatibility. For the new Nand Flash, it needs to have a cer...

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Problems solved by technology

[0005] However, it is precisely because of the absence of the participation of the flash memory controller in this move, and because the bit error probability of the Nand Flash itself is greatly increased, the "read" command inside the Nand Flash reads the data from the storage unit to the internal Register (register) ), this Bit error may occur, and when the internal "programming" command writes these data to another Page, it is equivalent to the original data being wrong, then the data of this Page will be read in the future At the same time, a new bit error may be generated, so that the bit error is amplified

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