Half duplex series communication bus external device interface

A technology of serial communication bus and external equipment, applied in the direction of instruments, electrical digital data processing, etc., can solve the problems of high board-level design difficulty and complex structure, etc.
CN1320471CInactive Publication Date: 2007-06-06VIMICRO CORP
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Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Patents(China)
Current Assignee / Owner
VIMICRO CORP
Publication Date
2007-06-06
Estimated Expiration
Not applicable Β· inactive patent

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Abstract

The present invention provides a half-duplex serial communication bus peripheral equipment interface, including physical layer protocol implementation module, high layer protocol implementation module and interface module; the described interface module is connected with two data wires in SPI bus, namely main equipment input / slave equipment output data wire, and main equipment output / slave equipment input data wire, and also connected with reading data signal wire and writing data signal wire so as to form reading / writing data channel of said interface. Said invention also includes SPI data wire multiplex module.
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Description

technical field

[0001] The invention relates to the field of serial communication, in particular to a half-duplex serial communication bus external device interface using a high-level protocol based on a serial synchronous peripheral device interface (Serial Peripheral Interface, SPI). technical background

[0002] Serial communication is a very important data communication method between the master device and the external device. Fewer data lines are required compared to a parallel communication bus. Serial Synchronous Peripheral Interface (Serial Peripheral Interface, SPI) is a synchronous serial bus proposed by Motorola, which is used for data exchange between the master device and the peripheral device. The SPI bus is a master-slave communication mechanism, the master device is the master device, and the peripheral device is the slave device. The SPI bus consists of 4 buses, namely the serial clock line (SCK), the master device input / slave device output data line (MISO...

Claims

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