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Computer system having multi-tasking I/O interface module framework

A computer system, input and output technology, applied in the field of computer systems, can solve the problem of low cost of upgrading PCI speed and so on

Active Publication Date: 2004-11-10
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Peripheral Component Connection Interface (PCI) has been the mainstream technical standard governing data transmission in computers for many years, but upgrading the speed of PCI is costly

Method used

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  • Computer system having multi-tasking I/O interface module framework
  • Computer system having multi-tasking I/O interface module framework
  • Computer system having multi-tasking I/O interface module framework

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Embodiment Construction

[0017] see Figure 5 The first schematic diagram of the computer system of the present invention having a multiplex input / output interface architecture, the computer system architecture shown in the figure includes a central processing unit 11 for processing various information and data calculations of the entire computer system, and the central processing unit 11 borrows the first chip 12 and the system memory 13 are connected with other peripherals, the central processing unit 11 and the first system bus 101 of the first chip 12 are implemented as a front-side system bus, and a memory controller is provided in the first chip 12 to connect with the system memory. The first bus 51 is connected to the first system memory 13a, and the second bus 52 is connected to the second system memory 13b. The first bus 51 and the second bus 52 are compatible with the commonly used 64-bit double data transfer rate memory bus and A bus of multi-bandwidth memory technology. The bus of multi-ba...

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Abstract

The invention relates to a computer system with multiplex O / I interface constructions, using many multiplex O / I interfaces to construct the connection buses for CPU, memory and chip groups, and including: a CPU; a first chip, connected to the CPU with a fore-end system bus; a memory, connected to the first chip by a multi-frequency width memory constructed bus; a display driver module, connected to the first chip with a multiplex O / I interface constructed bus; and a second chip, connected to the first chip with a multiplex O / I interface constructed bus, and connected with the peripheral devices of the computer system and many connection ends.

Description

technical field [0001] The invention relates to a computer system with a multiplex I / O interface architecture used for connecting buses in the computer system architecture, in particular to a computer system architecture using the PCI-Express bus interface. Background technique [0002] In the current or commonly used technology, because the data processing speed of the central processing unit (Central Processing Unit, CPU) is far greater than the bus data transmission speed between the central processing unit and the system memory (ie random dynamic access memory, DRAM), and the central processing unit When processing data, it is necessary to access the system memory at any time. Therefore, if you want to improve the performance of the overall computer system, you can improve the bus for data transmission. [0003] For the current general framework, see figure 1 The first schematic diagram of the internal structure of the commonly used technology computer system, as shown ...

Claims

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Application Information

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IPC IPC(8): G06F13/14
Inventor 许峻荣张伊佐余嘉兴
Owner VIA TECH INC
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