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Circuit for indipendently regulating rise and down boundary time of signal

A circuit and boundary technology, applied in the field of input buffer circuit, can solve the problem of rising boundary time delay rising and so on

Inactive Publication Date: 2005-05-18
ETRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, these methods do not enable the rising boundary time delay and the falling boundary time delay to be changed independently
For example, attempting to increase the falling boundary time delay will either delay the rising boundary time falling, or delay the rising boundary time

Method used

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  • Circuit for indipendently regulating rise and down boundary time of signal
  • Circuit for indipendently regulating rise and down boundary time of signal
  • Circuit for indipendently regulating rise and down boundary time of signal

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Embodiment Construction

[0020] A preferred embodiment of the present invention discloses a circuit capable of independently controlling the rising and falling delay boundary times of a signal. Further, techniques for changing the delay time of each individual delay element are disclosed. Finally, a specific embodiment of a device for combining rising and falling delayed signals into a common, delayed output signal is disclosed. Obviously, those skilled in the art of the present invention can apply and extend the present invention without departing from the scope of the claims of the present invention.

[0021] see figure 2 , which is a preferred embodiment of the present invention, and several important features of the present invention will be described in detail below. The present invention includes a circuit 30 for independently controlling the timing of the rising and falling delay boundaries of an input signal 50 . The circuit 30 further includes a first delay element 34 and a second delay e...

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PUM

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Abstract

A circuit capable of regulating the rising and falling boundary time of a signal independently includes a first delay element and a second delay element having an input and output, each input is connected to an ordinary input signal, secondly, a logic and a function having two inputs an one output; one input is linked to the input signal, the other is connected to the output of the first delay element. Said logic and function output is composed of a rising delay signal, a controlled rising boundary delay is between the rising boundary of the input signal and the rising boundary of the rising delay signal, finally, a logic or function having two inputs one output, one input is linked to the input signal, the other to the output of the second delay element constituting a falling delay signal, a controlled falling boundary delay between the falling boundary and that of the delay signal.

Description

technical field [0001] The invention relates to an input buffer circuit, especially a circuit which can independently adjust the rising and falling boundary time of a signal. Background technique [0002] Most input signals to integrated circuit (IC) devices must undergo signal conditioning processing. see Figure 1 , represents an IC device 10 . In this extremely simplified system, one input: the input signal SIGNAL 14 inputted from the external pins of the receiving device 10 . An input circuit, also called an input buffer circuit, consists of an inverter I1 22 and an inverter I2 26 in the IC device 10 . The interval signal SIGNAL_IC 18 is generated by the input signal SIGNAL 14 after passing through the input circuit. [0003] Both the inverter I1 22 and the inverter I2 26 are composed of transistor devices. These transistor devices, not shown, require a short period of time to switch states. These switching times are called delay times or boundary delay times. Figu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/15
Inventor 夏濬
Owner ETRON TECH INC