Method of Forming an Embedded Memory Device

Abstract

The present disclosure describes a method of forming a memory device. The method includes receiving a wafer substrate, forming a poly stack pattern on the wafer substrate, performing an ion implantation process to form a source and a drain in the wafer substrate, forming a memory gate and a control gate in the defined poly stack pattern, and forming a control gate in the control poly stack pattern. Forming the memory gate further includes performing a memory gate recess to bury the memory gate in an oxide layer.

Description

PRIORITY DATA[0001]The present application is a divisional of U.S. application Ser. No. 13 / 566,710, filed Aug. 3, 2012, which is incorporated herein by reference in its entirety.BACKGROUND[0002]A typical flash memory device includes a memory array having a large number of memory cells arranged in blocks. Each of the memory cells includes a field effect transistor having a control gate and a floating gate. The floating gate holds a charge and is separated from source and drain regions in a substrate by an oxide. Each memory cell can be electrically charged by electrons injected onto the floating gate. The charge may be removed from the floating gate by an erase operation. The data in flash memory cells are thus determined by the presence or absence of charge in the floating gates.[0003]It is a trend in memory devices to scale down the device size for packing density and cost. In a conventional flash memory structure, it is a challenge to shrink the word line length due to conflicting...

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