Static random access memory (SRAM) arrays having substantially constant operational yields across multiple modes of operation

Abstract

Aspects disclosed include static random access memory (SRAM) arrays having substantially constant operational yields across multiple modes of operation. In one aspect, a method of designing SRAM arrays with multiple modes operation is provided. The method includes determining performance characteristics associated with each mode of operation. SRAM bit cells configured to operate in each mode of operation are provided to the SRAM array. SRAM bit cells are biased to operate in a mode of operation using dynamic adaptive assist techniques, wherein the SRAM bit cells achieve a substantially constant operational yield across the modes. The SRAM bit cells have a corresponding type, wherein the number of SRAM bit cell types in the method is less than the number of modes of operation. Thus, each SRAM array may achieve a particular mode of operation without requiring a separate SRAM bit cell type for each mode, thereby reducing costs.

Description

BACKGROUND[0001]I. Field of the Disclosure[0002]The technology of the disclosure relates generally to static random access memory (SRAM) arrays, and particularly to designing lower power, higher performance SRAM arrays.[0003]II. Background[0004]Mobile communications devices have become common in contemporary society. The prevalence of these mobile devices is driven in part by the wide range of functionality provided by such devices. To achieve this wide range of functionality, mobile devices are designed to achieve lower power operation for extended battery life, while also supporting higher performance, higher power operation. The memory employed within such devices plays an important role in determining the success of achieving both lower power and higher performance operation.[0005]In this regard, different types of memory exist, each possessing certain unique features. For example, static random access memory (SRAM) is a type of memory that can be employed in mobile communicatio...

AI Technical Summary

Benefits of technology

This patent describes a method of designing a static random access memory (SRAM) array that achieves a constant operational yield across multiple modes of operation. The SRAM array uses dynamic adaptive assist techniques to determine the mode of operation in which the SRAM bit cells operate, resulting in substantially constant operational yield in each mode. The method reduces the number of SRAM bit cell types required for the SRAM array, resulting in lower costs as compared to an SRAM array using SRAM bit cells designed for one mode of operation.

Problems solved by technology

An SRAM array can be designed to operate with lower power consumption, wherein such designs also operate with lower performance.

Alternatively, an SRAM array can be designed to achieve higher performance operation, thus requiring higher power consumption.

However, requiring a different SRAM bit cell design for each type of SRAM array may result in higher costs associated with design and manufacturing.