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WCDMA code chip processing equipment

A processing device and chip technology, applied in the field of WCDMA mobile communication, can solve the problems of complex control circuit design and excessive hardware resource occupation, and achieve the effects of flexible replication, saving hardware resources, and reducing system power consumption

Inactive Publication Date: 2008-03-05
ZTE CORP
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AI Technical Summary

Problems solved by technology

[0009] The technical problem to be solved by the present invention is to provide a WCDMA chip-level processing device, which is used to solve the problems of complex control circuit design and excessive hardware resource occupation caused by the use of cache technology for chip-level processing in the prior art

Method used

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  • WCDMA code chip processing equipment
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Embodiment Construction

[0039] Please refer to Figure 1, which is the WCDMA chip-level processing device of the present invention. This figure shows the external interface signals and internal components of the entire processing device. The entire chip-level processing device has three types of external interfaces, namely a bus interface and a sampling data interface. And chip-level output interface; the entire chip-level processing device 100 includes four main modules, namely: a register module 11, a clock management module 12, a framing processing module 13, and a descrambling, despreading and integration module 14.

[0040] In Figure 1, the input and output signal connections of the interface device are as follows:

[0041] The upper left signal of the interface device is mainly connected with the DSP digital signal processor. The main signals include: bus clock signal DSP_CLK, bus chip select signal DSP_CS, bus address line DSP_ADDR, bus write control signal DSP_WR, bus read control signal DSP_RD, b...

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Abstract

This invention discloses a device of WCDMA chip-level process device including a bus interface module, a sample data interface module, a chip-level output interface module, a register module connected to said bus interface module and used in maintaining the match information necessary for normal work of the device, a clock management module connected to the bus interface module and the sample data interface module for controlling and managing the clock of the device, a framing process module for framing based on the path time sequence information in the match information and the generated counting value to get frame head signals and a descramble and integral module used in descrambling, de-expanding and integral process to get and output symbol stage IQ data.

Description

Technical field [0001] The present invention relates to the field of WCDMA (Wide Code Division Multiple Access) mobile communications, in particular to a chip-level processing device used in WCDMA downlink reception. Background technique [0002] At present, three mainstream solutions coexist in the field of third-generation mobile communications, including WCDMA technology, CDMA (Code Division Multiple Access) technology and TD-SCDMA (Time Division-Synchronized Code Division Multiple Access). Code Division Multiple Access) technology. These three technologies are all based on the principle of spread spectrum communication. Since WCDMA evolved from GSM (Global System for Mobile Communication, Global System for Mobile Communication), it has a broader foundation for use. WCDMA can provide Voice, variable rate data, and multimedia services can adapt to a variety of environments, achieving global roaming, large system capacity and many other advantages. [0003] Although WCDMA is a q...

Claims

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Application Information

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IPC IPC(8): H04B1/707H04J13/02H04B7/216H04B1/711
CPCY02D30/70
Inventor 蔺化军
Owner ZTE CORP
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