A method and device for writing and reading data from a high-speed bus to a low-speed bus

Abstract

The invention provides a method and a device used for writing and reading data to a low-speed bus from a high-speed bus, wherein the method for writing data comprises the following steps: the data of the high-speed bus is encapsulated as intermediate data transmitted to the low-speed bus from the high-speed bus; the intermediate data comprises effective data and a transmission marker bit which is used for marking the effective data as address data or writing data; the intermediate data is obtained from a high-speed bus interface and is stored into a storage; and the intermediate data in the storage is obtained and analyzed, and then the intermediate data is written into the low-speed bus according to the transmission protocol of the low-speed bus and the transmission marker bit of the intermediate data. The invention can complete the data transmission from the high-speed bus to the low-speed bus through encapsulating the bottom read-write action in the CPU program into the function of the intermediate data transmitted to the low-speed bus from the high-speed bus without changing the bottom hardware.

Description

technical field [0001] The invention relates to the technical field of bus design, in particular to a method and a device for writing and reading data from a high-speed bus to a low-speed bus. Background technique [0002] In an embedded system, there are usually a variety of processors and dedicated chips, each of which completes different tasks, such as network protocol processing, signal modulation and demodulation processing, voice codec processing, signal control processing, and so on. In the general design, a 64-bit wide or 32-bit wide high-speed wide-bit processor is used to process the network protocol, and a dedicated chip is used to process signal modulation and demodulation, voice codec, signal control, etc., and the dedicated chip is often directly hung on the bus of the processor , A large amount of data is transferred between these processors and the dedicated chip through the bus. [0003] High-speed wide-bit processors such as Intel's StongArm and other simp...

AI Technical Summary

Problems solved by technology

However, when using this hardware method to deal with a large amount of data transmission problems of high- and low-speed equipment, on the one hand, this method is not flexible enough and has poor versatility. Once the interface bit width changes, the hardware of the device needs to be changed; on the other hand On the one hand, this scheme needs to divide the registers into address registers and data registers. The address registers are used to store address data, and the data registers are used to store actual written data. Because of the different uses of registers, more register resources are occupied.

Although the register access speed is fast, it occupies a large area and is expensive, resulting in a large occupation of the chip space of the embedded system and increasing the hardware cost.

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