Method for testing base band chip of satellite navigation receiver

A baseband chip and satellite navigation technology, applied in satellite radio beacon positioning systems, measurement devices, radio wave measurement systems, etc., can solve the problems of high cost, insufficient time resolution and result resolution of tests, failure recurrence and Regression testing is difficult and other issues, to achieve the effect of cost reduction, verification speed and cost reduction
CN101813783BActive Publication Date: 2012-11-28TECHTOTOP MICROELECTRONICS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
TECHTOTOP MICROELECTRONICS
Publication Date
2012-11-28

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Abstract

The invention relates to a method for testing a base band chip of a satellite navigation receiver. The method comprises the following steps in turn: receiving a navigation satellite radio-frequency signal and converting the radio-frequency signal into a digital intermediate-frequency signal; acquiring the obtained digital intermediate-frequency signal and converting the digital intermediate-frequency signal into a binary file; storing the obtained binary file; playing back the stored binary file to form the digital intermediate-frequency signal and transmitting the digital intermediate-frequency signal to the tested base band chip; and performing result accuracy judgment on the output of the tested base band chip. The method reduces the expense required for constructing a plurality of test platforms, and facilitates the judgment of the accuracy of the output of the to-be-tested base band chip on finer resolution.
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Description

technical field

[0001] The invention belongs to the field of integrated circuit testing devices, in particular to a testing method for a baseband chip of a satellite navigation receiver. Background technique

[0002] At present, the following methods are mainly used for the verification and testing of the baseband chip of the satellite navigation receiver:

[0003] 1. Register Transfer Level verification: The test stimulus (digital intermediate frequency signal) generated by the algorithm link is sent to the baseband chip to be tested, the output of the baseband chip is observed, and the correctness of the output result is analyzed. The advantages of this method are: 1) it can determine whether the baseband chip outputs the result at the correct time point on the cycle level; 2) it can determine the correctness of the output result of the baseband chip on the bit level; 3) it is convenient to test the recovery of the fault now. The disadvantages of this method are: 1) the ...

Claims

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