Dynamic voltage regulation system applied for low energy consumption and implementation method

Abstract

The invention relates to a dynamic voltage regulation system for low-power applications, characterized in that the system includes an on-chip monitoring module (1) for monitoring errors, and an adaptive power supply voltage regulation module (2) for adaptively adjusting voltage according to real-time system parameters ), a DC-DC converter (3), a dynamic voltage adjustment initial value module (4) for determining the initial voltage of the system and the number of buffer stages, and a main circuit (5). The method and system reduce the operating voltage of the chip, reduce the voltage margin, expand the range of the operating voltage of the chip, and reduce the power consumption of the chip.

Description

technical field [0001] The invention belongs to the field of embedded chip design, in particular to a dynamic voltage regulation system and implementation method for low power consumption applications, which can be applied to power consumption optimization in low power consumption embedded system chip design. Background technique [0002] In the existing low-power chips, dynamic voltage regulation effectively solves the problem of power consumption. As the size of the integrated circuit process shrinks to the ultra-deep submicron or even nanometer level, the power consumption density per unit area of ​​the chip also becomes Exponentially increasing, this makes power consumption an important issue that must be considered in addition to operating speed in integrated circuit design. Especially in recent years, all kinds of battery-powered handheld devices, wireless sensor network node chips and other chips have higher and higher requirements for low power consumption, so how to...

AI Technical Summary

Problems solved by technology

When a flip-flop goes metastable, there is no way to predict the output level of the unit, nor when the output will stabilize at the correct level

During this stable period, the flip-flop outputs some intermediate level, or may be in an oscillating state, and this useless output level can cascade down the various flip-flops on the signal path, and its propagation expands the circuit fault surface

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