Line-field synchronizing signal generating device with adjustable resolution

A line and field synchronization and signal generation technology, applied in the video field, can solve the problems of high resource consumption and complex implementation logic

Active Publication Date: 2013-08-14
SICHUAN PANOVASIC TECH +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At the same time, the state machine is used to realize the generation of line and field synchronization sign...

Method used

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  • Line-field synchronizing signal generating device with adjustable resolution
  • Line-field synchronizing signal generating device with adjustable resolution
  • Line-field synchronizing signal generating device with adjustable resolution

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Embodiment Construction

[0028] Specific embodiments of the present invention will be described below in conjunction with the accompanying drawings, so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when detailed descriptions of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0029] The function of the line and field synchronization signal generating device is based on the "Uncompressed Digital Video Standard" (CEA-861, the latest version is CEA-861-E) formulated by the Consumer Electronics Association (CEA). The horizontal and vertical synchronous signals and valid data signals of the standard timing realize the synchronous output of the input pixel file.

[0030] figure 1 It is a functional block diagram of a specific embodiment of the device for generating horizontal and vertical synchronous signals with adjustable resolution in the present ...

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Abstract

The invention discloses a line-field synchronizing signal generating device with adjustable resolution. Two line-field parameter registers are adopted to store line-field parameters in a default display mode and an adjustable display mode respectively, input of a port is selected according to the display mode at the top layer, and a corresponding line-field parameter is selected to be sent to a line-field synchronizing signal generating module; and a line signal counter performs counting to a clock, the field signal counter performs counting to the count cycle of the line signal counter, then according to the count values of the line signal counter and the field signal counter and the line-field parameters, high level or low level is output, and a line-field synchronizing signal and a data effective signal are obtained. According to the invention, FPGA (Field Programmable Gate Array) can be used to realize the line-field synchronizing signal generating device, Verilog language can be adopted to describe the two counters, judge modules adopt corresponding if statements to perform level judging according to count values so as to obtain the line-field synchronizing signal with adjustable resolution and the data effective signal, and the implementation logic is simpler and more intuitive.

Description

technical field [0001] The invention belongs to the field of video technology, and more specifically relates to a line and field synchronous signal generation device with adjustable resolution. Background technique [0002] A common horizontal and vertical synchronization signal generating device uses a state machine to generate corresponding horizontal and vertical synchronization signals, and the values ​​of the timing parameters are fixed, which are all values ​​at a specific resolution, that is, the resolution is not adjustable. For example, the VGA display designed by Li Guogang, Yu Jun, and Ling Chaodong in "The Implementation Method of VGA Graphics Controller Based on FPGA" strictly follows the "VGA industry standard". This kind of pattern. But in the simulation of image processing, etc., this method is inconvenient. As another example, for the digital video signal generator used for digital image processor detection, it is different from the traditional analog vide...

Claims

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Application Information

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IPC IPC(8): H04N5/06
Inventor 刘然李博乐田逢春谭迎春谭伟敏谢辉邰国钦黄振伟曹东华葛亮陈恒鑫叶莲
Owner SICHUAN PANOVASIC TECH
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