Load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing

A technology of load balancing and optimization methods, applied in the direction of resource allocation, multi-programming devices, etc., can solve the problems of reduced computing efficiency, poor scalability, etc., to improve overall performance, improve hardware resource utilization, and maximize system resource utilization Optimized effect

Inactive Publication Date: 2013-09-04
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Problems solved by technology

A good parallel method can exert a good load balancing effect, and an unba...

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  • Load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing
  • Load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing
  • Load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing

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Embodiment approach

[0064] The purpose of the present invention is to provide a load balancing optimization method for cooperative calculation of CPU and MIC architecture processor.

[0065] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0066] First, a brief introduction to the cooperative computing working mode of the CPU and the MIC architecture processor, such as figure 1 Shown:

[0067] The MIC architecture many-core processor has many computing core Cores, and its micro-architecture schematic diagram is as follows figure 2 Shown:

[0068] MIC architecture processors are generally used as coprocessors and work in conjunction with traditional CPUs. The MIC card communicates with the CPU through the PCI-E bus. The MIC coprocessor expansion card has a micro-operating system based on the Linux kernel, called uOS, and the...

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Abstract

The invention provides a load balancing optimization method based on CPU (central processing unit) and MIC (many integrated core) framework processor cooperative computing, and relates to an optimization method for load balancing among computing nodes, between CPU and MIC computing equipment in the computing nodes and among computing cores inside the CPU and MIC computing equipment. The load balancing optimization method specifically includes task partitioning optimization, progress/thread scheduling optimization, thread affinity optimization and the like. The load balancing optimization method is applicable to software optimization of CPU and MIC framework processor cooperative computing, software developers are guided to perform load balancing optimization and modification on software of existing CPU and MIC framework processor cooperative computing modes scientifically, effectively and systematically, maximization of computing resource unitization by the software is realized, and computing efficiency and overall performance of the software are remarkably improved.

Description

technical field [0001] The invention relates to the field of computer high-performance computing and scientific computing, in particular to a load balancing optimization method based on cooperative computing of CPU and MIC architecture processor. Background technique [0002] The traditional CPU is gradually approaching the limit of current semiconductor technology in terms of power consumption and main frequency. People have to find another way to innovatively develop multi-core or even many-core architecture processors. Came into being. The software mode of collaborative computing between CPU and MIC architecture processor will gradually become the mainstream software architecture mode of high-performance computing. [0003] However, in specific applications, we found that simply porting the application software to the heterogeneous platform composed of CPU and MIC architecture processor, the performance improvement is not ideal. This is the heterogeneous architecture pro...

Claims

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Application Information

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IPC IPC(8): G06F9/50
Inventor 吴庆
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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