General high-performance Radix-4SOVA decoder and decoding method

A decoder, high-performance technology, applied in digital transmission systems, electrical components, error prevention, etc., can solve problems such as inability to meet general decoding requirements and unsuitability

Inactive Publication Date: 2013-10-16
XIDIAN UNIV
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Problems solved by technology

The decoder improves the decoding speed by combining the two-step state transitions in the coding trellis graph into one step for decoding; the disadvantage of the decoder is that the update rule still uses the traditional Radix-2SOVA Update rules, so it is n

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  • General high-performance Radix-4SOVA decoder and decoding method
  • General high-performance Radix-4SOVA decoder and decoding method
  • General high-performance Radix-4SOVA decoder and decoding method

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Embodiment Construction

[0066] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0067] Refer to attached figure 1 , the decoder of the present invention includes: input data storage module 1, branch metric calculation module 2, cumulative path metric calculation module 3, credibility calculation module 4, credibility storage module 5, Turbo logarithmic likelihood ratio calculation module 6. Turbo external information calculation and storage module 7 , Turbo hard decision module 8 , CTC log likelihood ratio calculation module 9 , CTC external information calculation and storage module 10 , and CTC hard decision module 11 . in:

[0068] The input data storage module 1 receives the code word information sequence sent by the encoding end, and stores the received information according to the capacity of two frames. When the first frame is received, the decoding starts, and the second frame starts to be received. When the second frame When d...

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Abstract

The invention discloses a general high-performance Radix-4SOVA decoder and a decoding method. In the prior art, in the Radix-4SOVA decoder, only a binary system Turbo code based on bit interleaving is supported. By using the decoder and the method of the invention, the above problem is mainly solved. The method has the following steps of receiving channel information and storing; reading the channel information of a first component code, carrying out first component decoding which means that a branch metric, a cumulative path metric, credibility, a log-likelihood ratio and extrinsic information are successively calculated, interleaving the extrinsic information and storing; reading the channel information of a second component code and completing secondary component decoding; determining whether a maximum iteration is reached; if the maximum iteration is not reached, starting next iteration decoding; otherwise, carrying out hard decision on the log-likelihood ratio so as to obtain an estimation value of a decoding bit and finishing the decoding. According to the invention, a credibility updating method based on a bit pair is used; the general and configurable high performance decoding of a binary system Turbo code and a duobinary system convolution Turbo code can be realized; the method can be used in a general and configurable Turbo decoder in a LTE and WiMAX system.

Description

technical field [0001] The invention belongs to the technical field of wireless communication, and further relates to a Radix-4SOVA decoder in the technical field of channel coding, which can be used for decoding Turbo codes in LTE / WiMAX systems. Background technique [0002] High-throughput and high-performance Turbo code decoding is a core technology in the next generation broadband wireless communication system. Turbo code decoding algorithms are divided into two categories: one is the soft output Viterbi SOVA algorithm evolved from the Viterbi algorithm; the other is the maximum a posteriori probability MAP algorithm, and the logarithmic maximum a posteriori probability extended from the MAP algorithm Log-MAP algorithm and Max-Log-MAP algorithm. From the perspective of decoding delay, the MAP algorithm needs to calculate the forward and backward recursive processes twice, which has a large decoding delay, while the SOVA algorithm only needs to backtrack a fixed length i...

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Application Information

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IPC IPC(8): H04L1/00
Inventor 葛建华任德锋高明岳安军丁维浩胡秘
Owner XIDIAN UNIV
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