Anti-interference method of synchronous clock device of intelligent substation

A technology for smart substations and synchronous clocks, applied in synchronous devices, electrical components, digital transmission systems, etc., to achieve the effects of improving transmission efficiency, maintaining timing accuracy and stable operation, and avoiding abnormalities or even interruptions

Inactive Publication Date: 2015-03-25
XJ ELECTRIC +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide an anti-jamming method for a synchronous clock device in an intelligent substation, aiming to solve the problem of how to ensure the accuracy and reliability of network time synchronization in the event of a network storm

Method used

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  • Anti-interference method of synchronous clock device of intelligent substation
  • Anti-interference method of synchronous clock device of intelligent substation
  • Anti-interference method of synchronous clock device of intelligent substation

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Embodiment Construction

[0018] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0019] An anti-jamming embodiment of the present invention includes the following steps:

[0020] 1) Device FPGA simulates MAC to receive network messages, and establishes a circular buffer, the number of which is set to A.

[0021] 2) The FPGA counts the number of messages with the same CRC, and judges whether the number of messages exceeds the preset threshold within a preset time interval. If the number of messages exceeds the preset threshold, the message is a storm message; Block the message for a period of time, and restart the detection after the blocking timeout.

[0022] 3) For PTP time synchronization, FPGA simulates MAC to shield the broadcast, and only receives PTP messages with fixed Ethernet type and fixed UDP port number. The synchronous clocks currently used in smart substations are all based on 802.3 PTP time synchronization. Only receive ...

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Abstract

The invention relates to an anti-interference method of a synchronous clock device of an intelligent substation. Two layers of active defensive measures are taken to resist the network interference. The anti-interference method comprises the following steps that firstly, the number of messages with the same CRC is counted, whether the number is larger than a threshold value or not is judged, and if yes, the messages are shielded in the set time; secondly, messages with the same target MAC address are detected, the flow of the messages is counted, whether the flow of the messages is larger than the threshold value or not is judged, and if yes, the messages are shielded in the set time; shaking removing and overtime process are carried out on an input pulse per second to resist the electromagnetic interference, and the stability of time tick signals is kept. By means of the method, under the situation of electromagnetic interference and network flow interference, time tick precision of the synchronous clock device is kept, and the synchronous clock device can stably and reliably run.

Description

technical field [0001] The invention relates to an anti-interference method for a synchronous clock device of an intelligent substation, belonging to the field of development of an intelligent substation. Background technique [0002] A substation is a system with a very complex electromagnetic environment including strong current equipment and weak current equipment. During normal operation, there is a strong power frequency electromagnetic field in the space inside the substation. When switching operations, system failures or lightning strikes occur, strong transient electromagnetic fields are generated in the space. Strong power frequency and strong transient electromagnetic fields interfere with various equipment in substations, and there is also crosstalk among various equipment. If the clock device used in the smart substation does not suppress the interference, or only judges the length of the high level according to the conventional debounce method, a timing error ...

Claims

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Application Information

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IPC IPC(8): H04L7/00H04L12/813H04L47/20
Inventor 尹明周水斌闫志辉郑拓夫宋彦锋郝威
Owner XJ ELECTRIC
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