Device based on AES (advanced encryption standard) encryption/decryption algorithm and pipelining control method

A technology of control method and encryption algorithm, which is applied in the direction of encryption device with shift register/memory, etc., to achieve the effects of avoiding repeated design, improving design efficiency, and high data

Inactive Publication Date: 2015-05-20
SHENZHEN INST OF ADVANCED TECH
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  • Application Information

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Problems solved by technology

[0007] Based on this, it is necessary to address the technical problems existing in the prior art and provide a device and pipeline control method based on the AES ...

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  • Device based on AES (advanced encryption standard) encryption/decryption algorithm and pipelining control method
  • Device based on AES (advanced encryption standard) encryption/decryption algorithm and pipelining control method
  • Device based on AES (advanced encryption standard) encryption/decryption algorithm and pipelining control method

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Embodiment Construction

[0065] Based on the AES encryption algorithm, the present invention provides a device based on the pipeline control technology based on the AES encryption / decryption algorithm, which improves the hardware implementation of the AES algorithm in terms of area, power consumption and speed, and can effectively avoid repeated design and improve Design efficiency: For lengthy and complicated key generation algorithms and encryption and decryption algorithms, unique pipeline and parallel algorithms are designed to achieve high data throughput. Various embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0066] Such as figure 1 As shown, in one embodiment of the present invention, a kind of device based on AES encryption / decryption algorithm is provided, and it comprises a plurality of cycle calculation modules 100 connected in sequence, and each cycle calculation module 100 comprises the following functional modules: ...

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Abstract

The invention provides a device based on AES (advanced encryption standard) encryption/decryption algorithm and a pipelining control method. The method comprises the following steps that a first composite domain matrix is buffered, and in addition, a first inversion operation starting instruction is generated after the waiting for the first delay time; exclusive-or operation is utilized in a composite domain GF((2<4>)<2>) according to the first inversion operation starting instruction, and a first multiplicative inverse element is solved on the basis of the first composite domain matrix; the first multiplicative inverse element is cached, and in addition, a first transform operation starting instruction is generated after the waiting for the second delay time; according to the first transform operation starting instruction, the first multiplicative inverse element is transformed into a finite domain GF(2<8>) from the composite domain GF((2<4>)<2>), and a first finite domain matrix is obtained; the first finite domain matrix is sequentially subjected to affine transformation and line shift transformation, and a first middle state matrix is obtained. The device and the method solve the problem that the defects in the aspects of area, power consumption and velocity exist when the existing hardware is used for realizing an AES algorithm.

Description

technical field [0001] The invention relates to the realization technology of the AES encryption algorithm, in particular to a device and a flow control method based on the AES encryption / decryption algorithm. Background technique [0002] AES (Advanced Encryption Standard) is the Advanced Encryption Standard, which is a new information encryption algorithm established and used by the US NIST (National Institute of Standards and Technology) in 2002. The AES algorithm integrates security, efficiency, and flexibility, and is the safest and most effective encryption technology so far. For the simplest AES encryption algorithm with a 128-bit key length, even if a machine that completes 56-bit DES cracking within 1 second, it will take about 149 trillion years to crack. [0003] The AES encryption algorithm uses the Rijndael algorithm, which is a symmetric key encryption algorithm standard. It uses an iterative block cipher algorithm. The key length can be 128 bits, 192 bits or ...

Claims

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Application Information

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IPC IPC(8): H04L9/06
Inventor 梁允萍李烨
Owner SHENZHEN INST OF ADVANCED TECH
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