Low Dropout Linear Regulator and Method of Increasing Its Stability and Phase-Locked Loop

A low-dropout linear, voltage-stabilizer technology, applied in the field of phase-locked loops, which can solve problems such as poor noise performance

Active Publication Date: 2017-05-31
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Embodiments of the present invention provide a low-dropout linear voltage regulator, a method for increasing its stability, and a phase-locked loop to overcome the problem of poor noise performance of the existing low-dropout linear voltage regulator

Method used

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  • Low Dropout Linear Regulator and Method of Increasing Its Stability and Phase-Locked Loop
  • Low Dropout Linear Regulator and Method of Increasing Its Stability and Phase-Locked Loop
  • Low Dropout Linear Regulator and Method of Increasing Its Stability and Phase-Locked Loop

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Embodiment Construction

[0025] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0026] see figure 2 , is a schematic structural diagram of an embodiment of the LDO of the present invention.

[0027] Such as figure 2 As shown, the LDO of the present invention may include: a reference voltage source 201 , an error amplifier 202 , an adjustment circuit 203 , a first compensation circuit 204 , a second compensation circuit 205 and a load 206 .

[0028]Wherein, the reference voltage source 201 is used to provide a reference voltage; the error amp...

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Abstract

Embodiments of the present invention disclose a low dropout regulator, a method for improving stability of the low dropout regulator, and a phase-locked loop. The low dropout regulator includes: a reference voltage source, an error amplifier, a regulating circuit, a load, a first compensation circuit, and a second compensation circuit. The first compensation circuit is coupled to the regulating circuit, and is configured to regulate a dominant pole and a secondary dominant pole of the low dropout regulator, to regulate a phase margin. The second compensation circuit is configured to: regulate and decrease the dominant pole of the low dropout regulator and further increase the secondary dominant pole on the basis that the first compensation circuit has regulated the dominant pole and the secondary dominant pole of the low dropout regulator, so as to regulate the phase margin; and regulate a gain-bandwidth product of the low dropout regulator. By using the low dropout regulator according to the embodiments of the present invention, a value of the gain-bandwidth product and a size of the dominant pole can be significantly reduced, and a size of the secondary dominant pole can be increased, so that the error amplifier has better noise performance.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a low-dropout linear voltage regulator, a method for increasing its stability and a phase-locked loop. Background technique [0002] A Phase Locked Loop (PLL for short) refers to an automatic control closed-loop system composed of a Phase Detector, a Loop Filter, and a Voltage Control Oscillator (VCO). . Because PLL can complete the phase synchronization of two electrical signals, it is widely used in fields such as broadcast communication, frequency synthesis, automatic control and clock synchronization. Since power supply noise and fluctuations will affect the stability of the PLL, in actual use, it is usually necessary to use a low dropout linear regulator (LDO for short) to overcome the influence of power supply noise and fluctuations on the PLL, to ensure that the PLL and other noise-sensitive characteristics of the circuit. [0003] Such as figure 1 As shown, the existing ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05F1/56
CPCG05F1/575G05F1/56H03L7/08
Inventor 张津海蔡飞周盛华
Owner HUAWEI TECH CO LTD
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