4 results about "Gain–bandwidth product" patented technology

The application provides a folded cascode amplifier, an integrated circuit, a chip and an electronic device. The folded cascode amplifier comprises a bias circuit configured to provide a bias current according to a bias voltage, a first input differential unit and a second input differential unit arranged symmetrically, a folded cascode unit, and a fifth group of current mirrors connected to the folded cascode unit. The folded cascode unit comprises a first group of cascode tubes and a second group of cascode tubes, and a first group of current mirrors to a fourth group of current mirrors. The first group of cascode tubes comprises a first output transistor and a first load current tube connected in series, the second group of cascode tubes comprises a second output transistor and a second load current tube connected in series, and the first group of current mirrors multiplexes the first load current tube, and the fourth group of current mirrors multiplexes the second load current tube. The folded cascode amplifier improves the transconductance, the slew rate, the conversion rate and the gain-bandwidth product through the proportional cooperation of the several groups of current mirrors.

This invention discloses an operational amplifier based on a cyclic folded cascode architecture, relating to the field of analog circuit technology, to address the problems of low energy efficiency in existing folded cascode amplifiers and limited energy efficiency improvement in cyclic folded cascode structures. It includes a differential input transistor, a current mirror, an adaptive bias circuit, and an output stage. The adaptive bias circuit is connected to the differential input transistor, and the current mirror is connected to both the differential input transistor and the output stage. The adaptive bias circuit includes a flip-flop voltage follower. The current mirror is used for current recycling and zero-point compensation, and the output stage is used to output amplified signals. The adaptive bias circuit includes a flip-flop voltage follower to improve the dynamic performance of the amplifier. Zero-point compensation can improve the phase margin of the circuit, further improving the gain-bandwidth product. Compared to traditional operational amplifiers, the operational amplifier of this invention can achieve higher bandwidth and higher energy efficiency with lower power consumption.

An amplifier circuit is provided. The amplifier circuit includes a first transimpedance amplifier and a first transconductance amplifier. The first transimpedance amplifier is to receive a first input signal. A first input of the first transconductance amplifier is coupled to a first output of the first transimpedance amplifier. The first transconductance amplifier includes a first passive feedback structure and a first active feedback structure. The first passive feedback structure includes a first resistor coupled between the first output of the first transimpedance amplifier and the first input of the first transimpedance amplifier. The first active feedback structure includes a first inverter having an output coupled to the first input of the first transimpedance amplifier. This configuration optimizes the gain-bandwidth product and stability of the amplifier circuit.

This invention discloses a high-bandwidth, notch-free hybrid magnetocurrent sensor circuit, comprising a low-frequency path, a high-frequency path, a differential amplifier, a compensation path, and a dual-to-single converter. The low-frequency path utilizes a Hall effect sensor and auxiliary bias circuitry to detect the low-frequency component of the current, and simultaneously suppresses sensitivity drift and common-mode drift by replicating a negative temperature coefficient voltage. In the high-frequency path, the integrator consists of two paths with the same gain-bandwidth product but different low-frequency gains, and gain flatness is improved through compensation technology. The servo loop employs active capacitor amplification technology, using small-area resistors and capacitors to achieve ultra-low-frequency poles. The outputs of the high- and low-frequency paths are combined via a differential amplifier and then pass through a subtractor and a high-pass filter to form a compensation path for eliminating chopper ripple. Finally, the signals are converged in the dual-to-single converter to obtain a notch-free broadband output. This invention simultaneously solves problems such as chopper notch, gain unevenness caused by pole-zero mismatch, and the use of large-area passive components.