2 results about "Distributed circuit" patented technology

This invention relates to a packaging structure and design method for an embedded notch filter circuit within a single-photon detector readout module. The packaging structure includes a microwave multilayer dielectric substrate; the microwave multilayer dielectric substrate comprises multiple dielectric layers stacked along its thickness direction, with metal conductive strips at the top, bottom, and between each dielectric layer; multiple metallized vias are disposed within the microwave multilayer dielectric substrate; the metal conductive strips and metallized vias cooperate to form a distributed circuit, enabling signal transmission and circuit interconnection between the dielectric layers; an input notch filter circuit and an output notch filter circuit are embedded within the microwave multilayer dielectric substrate, both of which are interconnected by metal conductive strips and metallized vias located between the dielectric layers. Compared to traditional readout modules, this invention not only reduces the overall circuit size and manufacturing costs but also significantly improves the readout module's suppression performance for gated frequency signals and their harmonic signals.

The application discloses a spectrum sensing hypergraph partitioning method for MFS large-scale signal processing, which is used for partitioning a super large-scale integrated circuit which is comprehensively completed on an MFS platform, and comprises the following steps: hypergraph coarsening based on an LSH algorithm; performing an initialization method with spectrum sensing on the most coarsened hypergraph to obtain an initialization partition; running an FM algorithm with distance weighting on the obtained initialization partition to perform optimization, then desparsing, restoring the coarsened hypergraph to the hypergraph of the previous level, again using the FM algorithm to locally optimize, and alternately performing desparsing and the FM algorithm until the most original hypergraph, and completing the hypergraph partitioning. Compared with a traditional multi-polarized hypergraph partitioning method, the application can perform topology optimization for an MFS system, can process multi-dimensional weights, is helpful to improve the performance of the distributed circuit, and leaves more resource redundancy for subsequent wiring.