94 results about "Input resistance" patented technology

A sigma-delta analog-to-digital converter is provided that includes an initial continuous-time integration stage having a variable input resistor and an integration capacitor. A switched-capacitor circuit charges and discharges a replica capacitor to a reference voltage to generate a bias current. A SAR-based tuning circuit includes a variable tuning resistor that generates a tuning voltage while conducting a mirrored version of the bias current. A resistance of the variable input resistor is adjusted responsive to a tuning code from the SAR-based tuning circuit.

The invention belongs to the technical field of integrated circuits, and particularly discloses a numerical control programmable gain amplifier chip, which adopts an SIP (Session Initiation Protocol) packaged operational amplifier, a digital potentiometer, an input end Vin and an output end Vout, and is characterized in that an alternating current signal is input from the Vin end and is connected to an inverted input end of the operational amplifier through a capacitor C1 and an input resistor R1; a positive power supply pin of the operational amplifier is connected with a power supply positive electrode VDD, a negative power supply pin is grounded, and a VDD / 2 direct current bias voltage is obtained by an in-phase input end through a precision resistance voltage dividing network and is accessed after low-pass filtering; the high end of the digital potentiometer is connected with the Vout end, the low end is connected with the inverting input end of the operational amplifier, and a feedback path is formed through a sliding end. The digital potentiometer and the operational amplifier are integrated, high integration and modularization of the programmable gain amplification circuit are achieved, and the problems that in a traditional discrete scheme, due to analog switch conduction resistance, gain precision is insufficient, reliability of a multi-element system is lowered, and the circuit size is large are solved.

The invention discloses a single-port detection resonator resonant frequency on-line real-time measurement system for an MEMS gyroscope, and the system comprises a closed-loop drive circuit which is used for driving a resonator to resonate and outputting a drive detection signal; the first C / V conversion circuit converts the current into a detection voltage signal, and the on-off of the first C / V conversion circuit and the negative resistance circuit is controlled by a voltage control switch; the negative resistance circuit enables the equivalent input resistance of the first C / V conversion circuit to be a negative value so as to generate positive damping feedback force on the detection resonator; the multiplier is used for carrying out multiplication demodulation on the detection voltage signal and the driving detection signal, and the angular velocity of the MEMS gyroscope is output after the signals are filtered by the low-pass filter; the upper computer controls the on-off of the voltage control switch, the frequency fd and the frequency fs are calculated through fast Fourier transform by driving the detection signal and the detection voltage signal respectively, the frequency difference is obtained by solving the difference, and the resonant frequency of the single-port detection resonator is measured on the premise that the work of the MEMS gyroscope is not affected.

The utility model provides an explosion-proof electric leakage test device. The explosion-proof electric leakage test device comprises a junction box, an input assembly and at least two output assemblies, the input assembly comprises an input electric connector, a sensor input terminal and an input resistor; the output assembly comprises an output electric connector, a sensor output terminal and an output resistor; the sensor output terminals of the at least two output assemblies are respectively connected with the sensor input terminals through circuits, and the at least two output assemblies are arranged in parallel; wherein the input electric connector is connected with an external circuit, and the output electric connector is connected with the external circuit or a ground wire; current in an external circuit passes through the input electric connector, the sensor input terminal, the input resistor, the output resistor, the sensor output terminal and the output electric connector and then flows to other external circuits or ground wires so as to carry out an electric leakage test. According to the utility model, by integrating resistors with different resistance values and setting a flexible circuit access mode, the efficiency and the safety of a leakage test are significantly improved.

A differential transceiver including a driver circuit and a receiver circuit, and a serial communications network including the transceiver. The receiver circuit includes an input resistor attenuator, having first and second attenuator inputs coupled to the first and second terminals, respectively, a differential comparator having first and second comparator inputs, and an output buffer having an input coupled to the output of the comparator. The receiver circuit further includes a first switch coupling the first attenuator output to the first comparator input, a second switch coupling the second attenuator output to the second comparator input, and a fail-safe circuit including first and second current sources coupled to the first and second comparator inputs, respectively, and third and fourth switches coupled in series between the first and second current sources.

The invention relates to a multi-protocol communication interface chip receiver. The receiver comprises an RS232 receiver and an input switch resistance circuit, wherein the input end of the RS232 receiver is connected with the input switch resistance circuit; the input switch resistance circuit is used for enabling the input end of the RS232 receiver to be in a determined state voltage under the condition that the chip is turned off, and comprises a driving control circuit, a switch grid control and clamping circuit, a switch circuit and an input resistor; the design problem of a multi-protocol communication interface chip caused by incompatibility of the communication protocols of the RS232 receiver and the RS485 receiver in the aspects of common-mode input impedance and the like is solved, and the design of the multi-protocol communication interface chip can be realized.

The invention discloses a multi-channel radio frequency assembly power supply fault detection circuit, and belongs to the technical field of electronic information. The circuit comprises a voltage weighted summation circuit module, the voltage weighted summation circuit module is used for endowing power supply voltages of a plurality of radio frequency components with different weights and carrying out weighted summation, each radio frequency component corresponds to an input resistor, and different values of the input resistors are used for endowing the radio frequency components with different weight values; and the anti-phase acquisition circuit module is used for inverting the weighted summation result of the voltage weighted summation circuit module and outputting a code through an analog-to-digital converter to judge whether the power supply voltage of the channel where each radio frequency component is located is normal or not. According to the invention, the complexity of the circuit is greatly reduced, the use number of digital processor interfaces is reduced, and the cost is effectively reduced.

The invention discloses a non-contact real-time current monitoring device, which comprises a magnetic field induction sub-device and an analog signal processing sub-device, and is characterized in that the signal output end of the magnetic field induction sub-device is electrically connected with the signal input end of the analog signal processing sub-device; the analog signal processing sub-device comprises an impedance matching sub-module, a passive RC pre-compensation sub-module and an active integration sub-module which are cascaded in sequence; the impedance matching sub-module comprises an input matching resistor and an output matching resistor; the passive RC pre-compensation sub-module comprises a resistor and a capacitor, the resistor and the capacitor form an RC loop, and the passive RC pre-compensation sub-module is cascaded between the impedance matching sub-module and the active integration sub-module; the active integration sub-module comprises an operational amplifier, an input resistor, an integration capacitor and a feedback resistor. The device provided by the invention can directly output an analog voltage signal which is homologous with a measured current waveform through an exquisite collaborative design.

The invention discloses a multi-path instrumentation amplifier which comprises a low-frequency amplification circuit and a high-frequency amplification circuit which are coupled between a voltage input end and a voltage output end. The high-frequency amplification circuit comprises a first amplifier, a second amplifier, a first input resistor, a first input capacitor, a second input resistor, a second input capacitor, a first feedback capacitor and a second feedback capacitor. The reverse output end and the non-reverse output end of the first amplifier are respectively coupled with the non-reverse input end and the reverse input end of the second amplifier, and the non-reverse output end and the reverse output end of the second amplifier are coupled with the voltage output end. The first feedback capacitor is coupled between the voltage output terminal and the inverting input terminal of the first amplifier. The second feedback capacitor is coupled between the voltage output terminal and the non-inverting input terminal of the first amplifier.

This application relates to the field of operational amplifier circuit technology, and more particularly to an inverting operational amplifier circuit for eliminating input offset voltage. It includes an input resistor for receiving an input voltage; an operational amplifier for inverting and amplifying the input voltage; an output resistor section connected in series between the output terminal of the operational amplifier and the input resistor, the output resistor section being composed of multiple output resistors connected in series; multiple current sources connected to nodes between the various output resistors of the output resistor section, the current sources being used to compensate for the output offset voltage caused by the input offset voltage of the operational amplifier; and a digital code input section for adjusting the current values ​​of the current sources; wherein the voltage value of the output offset voltage is determined based on the current values ​​of the multiple current sources and the corresponding resistance values ​​of the output resistor section. Using this application is advantageous for canceling the output offset voltage caused by the input offset voltage of the operational amplifier and appearing at the output terminal.

The application belongs to the technical field of integrated circuits, and specifically discloses a digital control programmable gain amplifier chip, which adopts an SIP packaged operational amplifier, a digital potentiometer, an input end Vin and an output end Vout, an alternating current signal is input from the Vin end, is connected to the inverting input end of the operational amplifier through a capacitor C1 and an input resistor R1, a positive power supply pin of the operational amplifier is connected to a positive electrode VDD of a power supply, a negative power supply pin is connected to the ground, a same-phase input end obtains a VDD / 2 direct current bias voltage through a precision resistor voltage dividing network and is connected after low-pass filtering, a high end of the digital potentiometer is connected to the Vout end, a low end is connected to the inverting input end of the operational amplifier, and a feedback path is formed through a sliding end. The operational amplifier and the digital potentiometer are integrated, high integration and modularization of the programmable gain amplification circuit are realized, and the problems of insufficient gain precision, decreased reliability of a multi-element system and large circuit volume caused by the on-resistance of an analog switch in a traditional discrete scheme are solved.

The invention relates to the technical field of operational amplification circuits, in particular to an inverted operational amplification circuit for eliminating input offset voltage. The input resistor is used for receiving an input voltage; the operational amplifier is used for outputting the input voltage after inverting amplification; the output resistor part is connected between the output end of the operational amplifier and the input resistor in series, and the output resistor part is formed by connecting a plurality of output resistors in series; a plurality of current sources respectively connected to nodes between output resistors of the output resistor unit, the current sources compensating an output offset voltage caused by an input offset voltage of the operational amplifier; the digital code input part is used for adjusting the current value of the current source; wherein the voltage value of the output offset voltage is determined according to the respective current values of the plurality of current sources and the resistance value corresponding to the output resistance part. According to the invention, the offset of the output offset voltage caused by the input offset voltage of the operational amplifier and appearing at the output end is facilitated.

The application discloses a kind of complete non-volatile Boolean logic circuit based on 1T1R array and control method thereof, belong to microelectronic device technical field, for the logic value P and / or logic value Q of input is carried out logic operation;Wherein, the input resistance state of memristor M1 is determined by logic input Q, input voltage is fixed as-V0, the input voltage of memristor M2 is fixed as V1, the input voltage C on word line WL is determined by logic operation type and logic value Q, P;The input voltage D on source control end is determined by logic operation type, logic value P and voltage C, the resistance state of memristor M2 is as the output of calculation result;The application fully utilizes the switching characteristic of transistor in 1T1R structure on logic algorithm, by dynamically configuring the input voltage on word line WL and source control end, i.e., complete Boolean logic function can be realized in two steps, and non-volatile Boolean logic operation efficiency can be improved with less operation steps and fixed circuit topology.

The application provides a high-balance active balun circuit, which comprises an RF signal input port, a signal input matching stage, a single-end to differential circuit and an output load stage, wherein the signal input matching stage comprises a first transistor, a second transistor, an input resistor and an input inductor, and the single-end to differential circuit comprises a third transistor, a fourth transistor, a fifth transistor and a capacitor. The application does not need to waste chip area to make a complex matching circuit. When the circuit is connected in the front stage, the circuit will not cause the problem that power cannot be transmitted due to high-frequency reflection. The phase adjusting inductor is introduced into the circuit, and the frequency phase characteristics of the inductor are used to compensate the phase imbalance of the differential output. The bandwidth extension technology is used in the load, so that the phase shifter maintains the flatness of the gain in a wide frequency. Meanwhile, the two-stage cascade transistor is used to realize the single-end input to differential output gain stage architecture, which is more suitable for low-voltage application.

The utility model discloses a kind of multi-path protection signal control circuit, belong to the technical field of automation equipment protection circuit.The circuit is input by several protection sensor signals, and each signal is connected to N channel MOS field effect transistor through input resistance and load resistance, and MOS tube is connected to triode after cascading, and triode output end connects motor driver I O port, and 24V is simultaneously stabilized as 5V for sensor power supply using 78L05.The utility model solves the problem of insufficient motor controller I O port resources, high cost and low reliability in prior art, can be flexibly configured according to sensor type, reduces cost and assembly difficulty, and improves system reliability.

The invention discloses a rectification circuit and a displacement measurement method and a displacement measurement system based on the rectification circuit. Wherein the rectifying circuit comprises a first operational amplifier circuit and a second operational amplifier circuit, a first input resistor in the first operational amplifier circuit is connected with an inverted input end of a first operational amplifier, a first feedback resistor is connected with the first operational amplifier in parallel, a first diode is connected with the first operational amplifier in parallel, and a second diode is connected with the first operational amplifier in series; the second operational amplifier circuit is connected with the first operational amplifier circuit in series through a second input resistor, the input end of the second input resistor in the second operational amplifier circuit is connected with the positive electrode of a second diode, the output end of the second input resistor is connected with the inverted input end of a second operational amplifier, and a third input resistor is connected with the inverted input end of the second operational amplifier. The second feedback resistor is connected in parallel with the second operational amplifier. According to the invention, the problem of test precision caused by phase difference in a displacement measurement system based on the differential transformer is successfully solved.

The utility model discloses an I / O port voltage detection circuit of a single chip microcomputer of a vehicle body controller, which comprises a plurality of input resistors, and one section of each input resistor is connected with an input switch; the combination of a plurality of input resistors and input switches is connected in parallel to a divider resistor R5 and a divider resistor R7, and is connected to the in-phase input end of the comparator U1; the reverse input end of the comparator U1 is connected with a divider resistor R6 and a divider resistor R8; the output end of the comparator U1 is connected with a diode D1, a current-limiting resistor R9 and a pull-up resistor R10, and is connected to an I O pin of the single-chip microcomputer U2. The utility model mainly solves the problem of a traditional automobile body controller I / O port voltage detection circuit, optimizes I / O port resources of a single-chip microcomputer, and can configure switches with different resistance values according to requirements to accurately distinguish effective signals.

The voltage measurement circuit measures the voltage of a plurality of cells connected in series. A plurality of input resistors are connected to each of the plurality of voltage measurement lines. A plurality of capacitors are connected between the lines. A plurality of discharge circuits are connected between the lines on the side closer to the voltage measurement circuit than the low-pass filter. The control circuit turns off the switch of a certain channel after a given time since the switch is turned on, and determines that an abnormality has occurred in the voltage measurement line between the two channels when the voltage of the channel adjacent to the channel exceeds a threshold voltage after the set time elapses from the turn-off time.

A sigma-delta analog-to-digital converter is provided that includes an initial continuous-time integration stage having a variable input resistor and an integration capacitor. A switched-capacitor circuit charges and discharges a replica capacitor to a reference voltage to generate a bias current. A SAR-based tuning circuit includes a variable tuning resistor that generates a tuning voltage while conducting a mirrored version of the bias current. A resistance of the variable input resistor is adjusted responsive to a tuning code from the SAR-based tuning circuit.

To provide an insulation resistance measuring device capable of increasing measurement precision of insulation resistance.SOLUTION: An insulation resistance measuring device comprises: a first terminal T1; a second terminal T2; a guard terminal G; a setting circuit for setting the input resistance of the guard terminal to a first value, and a second value that is smaller than the first value; a voltage determination section 13 for determining whether a first voltage value between the first terminal and the guard terminal is equal to or less than a first threshold; a voltage application circuit 11 for applying an application voltage between the first terminal and the second terminal; and a resistance measurement section 16 for measuring insulation resistance between the first terminal and the second terminal. When the voltage determination section determines that the first voltage value is equal to or less than the first threshold in a first state in which the setting circuit sets the input resistance to the first value, it is brought into a second state in which the setting circuit sets the input resistance to a second value and the voltage application circuit applies an application voltage, and the resistance measurement section measures the insulation resistance between the first terminal and the second terminal in the second state.SELECTED DRAWING: Figure 2

An electronic device may include wireless circuitry having digital-to-analog converters, filters, mixers, and current buffers disposed between the filters and the mixers. The current buffers may provide proper resistance termination for the filters. The current buffers may include current mirrors formed from diode-connected n-type transistors and diode-connected p-type transistors, which collectively provide a linear input resistance. The current mirrors may receive a high voltage from a voltage regulator having a replica current mirror and proportional-to-absolute-temperature current sources.

A delta-sigma analog-to-digital converter is provided that includes a continuous-time integration stage having an input terminal coupled through a switch to an input resistor that in turn couples to an input signal node. A feedback digital-to-analog converter converts a digital output signal to form a feedback current that also couples to the input terminal. A controller switches the first switch responsive to a duty cycle of the feedback current.

The utility model discloses a high-precision anti-interference rotary transformer decoding circuit. The decoding circuit is composed of a second-order Butterworth filter excitation circuit and a third-order Butterworth filter receiving circuit. The excitation circuit completes the function of a low-pass filter by selecting an adaptive gain and wide-product operational amplifier and calculating the resistance gain and the common-mode voltage of the amplifier, and meets the output requirement of an excitation signal at the same time. And the receiving circuit configures a corresponding input resistor and an operational amplifier by calculating a single-side on-state amplification factor and a cut-off frequency of the circuit so as to adapt to the use requirement of a rotary transformer decoding chip and complete low-noise receiving of a rotary transformer signal. The circuit is simple in structure, high in precision, strong in decoding capability, strong in inhibition capability for interference signals, and high in electromagnetic compatibility and reliability.

Amplifier circuit (1) for broadband and low-noise amplification of a capacitive current source, comprising a signal input (3) which can be connected to the capacitive current source in a node K1, an input stage (A1), wherein the input stage (A1) is connected to the node K1 at an input (7) of the input stage (A1) and has a node K2 at the output (9) of the input stage (A1), wherein the input stage (A1) is arranged to amplify an input voltage at least 3 times, wherein the input stage (A1) is arranged to provide a high-impedance input resistor at the input of the input stage (A1), wherein the input stage (A1) is arranged to provide a stable and load-independent voltage at the output of the input stage (A1), an amplifier cascade, wherein the amplifier cascade (11) has at least a first and a second amplifier (A2, A3), each with an input (13, 17) and an output (15, 19), wherein the output (15) of the first amplifier (A2) is connected in a node K3 to the input (17) of the second amplifier (A3), wherein the input (13) of the first amplifier (A2) is connected to the node K2, wherein the output (19) of the second amplifier (A3) is connected to a node K4, wherein the amplifier cascade (11) is arranged to generate a high signal amplification with low phase shift over a wide frequency range, a feedback network (F1), wherein the feedback network (F1) is connected to the input (7) of the input stage (A1) in node K1 and the output (19) of the second amplifier (A3) in node K4, wherein the feedback network (F1) is arranged to provide a high-ohmic feedback resistor with a parasitic capacitance of less than 0.5 pF, wherein the feedback network (F1) is arranged to provide a negative feedback to a structure comprising the input stage (A1) and the amplifier cascade (11), and a signal output (21) connected to a node K5, wherein the node K5 is connected to the node K4 or corresponds to the node K4, wherein the input stage (A1) comprises a junction field effect transistor (Q1) and a bipolar transistor (Q2), wherein a drain terminal of the junction field effect transistor (Q1) is connected to a base terminal of the bipolar transistor, wherein the junction field effect transistor (Q1) is connected as a source circuit, wherein the bipolar transistor (Q2) is connected as an emitter follower, wherein the first and second amplifiers (A2, A3) of the amplifier cascade (11) are operational amplifiers (Q3, Q4), wherein the first operational amplifier (Q3) has a voltage gain of more than 10 4 has, wherein the second operational amplifier (Q4) has a voltage gain of maximum 10 3 has, wherein the feedback network (F1) has a high-ohm feedback resistor with a parallel capacitance, wherein the feedback network (F1) comprises a series-connected low-pass filter.

The utility model provides an analog-to-digital converter which is used for transmitting collected analog signals to a master controller, and the master controller is provided with a first IO port and a second IO port. The analog-to-digital converter comprises a discharge assembly, an integral assembly and a comparison assembly, and the discharge assembly is connected with the first IO port and is used for being switched on or switched off under the control of an output signal of the first IO port. The integrating component comprises an integrator and an integrating capacitor connected in parallel between the output end and the inverted input end of the integrator; the in-phase input end of the integrator is connected with a collected analog signal, and the inverted input end of the integrator is grounded through an input resistor; two electrodes of the discharging assembly are connected in parallel with two ends of the integrating capacitor. The output end of the integrator is connected with the input end of the comparison assembly, the other input end of the comparison assembly is connected with reference voltage, and the output end of the comparison assembly inputs signals related to the collected analog signals to the master controller. Simple signal control and data transmission with the analog-to-digital converter are completed through two IO ports of the master controller.

A bias circuit configured to provide a differential voltage and a common-mode voltage. The bias circuit includes a differential circuit and a common-mode circuit. The differential circuit includes a first differential input resistor, a first differential output resistor, a second differential output resistor, and a second differential input resistor connected together in series, in that order, between first and second differential input terminals. A first differential output terminal is connected to a node between the first differential input resistor and the first differential output resistor; and a second differential output terminal is connected to a node between the second differential output resistor and the second differential input resistor. The common-mode circuit includes: a common-mode transistor has a conduction channel connected in series between: i) the node between the first differential output resistor and the second differential output resistor; and ii) a reference terminal; a common-mode resistor connected between: i) the node between the first differential output resistor and the second differential output resistor; and ii) a control terminal of the common-mode transistor; and a common-mode current source connected between the control terminal of the common-mode transistor and the reference terminal.

According to the enhanced high-electron-mobility transistor and the preparation method thereof provided by the invention, the P-type delta doping layer with higher doping concentration is arranged in the P-type gate structure, so that an electron barrier is formed in the P-type gate energy band structure, and in the working process of a device, the electron barrier can prevent electrons from flowing in the gate structure, so that electric leakage is reduced, and the reliability of the device is improved. Meanwhile, bombardment of electrons to gate metal is avoided, and gate reliability is improved; meanwhile, the delta doping layer can form hole potential wells in the P-type gate energy band structure one by one, and free flow of holes cannot be greatly influenced, so that the holes are freely injected into the device, and relatively low working on-resistance of the device is ensured; the inserted P-type delta doping layer can reduce the overall resistivity of the P-type gate structure to a certain extent, reduce the input resistance, and facilitate the improvement of the crystal quality of the overall P-type gate structure; and the P-type delta doping process can be compatible with the existing traditional epitaxial process equipment, and the process is simple and easy to implement.

The utility model discloses a current measuring device based on a Hall effect. The current measuring device comprises a Hall device, a power supply module, a signal processing module, a multi-gear sampling circuit module, a processing chip and a display module, the signal processing module transmits an amplified signal obtained after the voltage measurement value of the Hall device is processed by an operational amplifier to the multi-gear sampling circuit module and the processing chip; the multi-gear sampling circuit module comprises a plurality of groups of sampling circuits, each sampling circuit comprises an operational amplifier, each group of sampling circuit is provided with input resistors with different resistance values at the input end of the operational amplifier of the respective circuit, and amplified signals output by the sampling circuits are input to the processing chip for current calculation; the display module is connected with the processing chip and used for displaying current calculation results of the multiple sets of signals. Amplified signals input to the multi-gear sampling circuit module by the signal processing module are connected to one or more sets of sampling circuits. The power supply module comprises multiple groups of power voltage reduction modules and is used for outputting power supplies of different specifications.

A digital-to-analog converter (DAC) may include an integrator, an input network, and control circuitry. The input network may include a plurality of parallel taps, each having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member is coupled between an input of the digital-to-analog converter and an input of the integrator. The control circuitry may be configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the DAC, such that the control circuitry enables, substantially contemporaneously, an even number of members at a time in order to increase the analog gain, with half of such enabled members in a first group and half of such enabled members in a second group.

A voltage reference circuit portion (200, 300) includes a first current path, a second current path, a current source (204, 304) and a control portion (202, 302, 250, 354, 352). The first current path includes a first p-n junction (218) and an input resistor (216, 316), and the second current path includes a second p-n junction (214). The current source alternately supplies the same current to the first current path and the second current path, and the control portion compares a first voltage across the first current path and a second voltage across the second current path. The control portion adjusts the current supplied to the first and second current paths by the current source until the difference between the first and second voltages is below a predetermined tolerance amount.