Test structure, manufacturing method of test structure and test method
A technology of test structure and manufacturing method, applied in semiconductor/solid-state device testing/measurement, single semiconductor device testing, semiconductor/solid-state device components, etc. problems, to achieve the effect of improving accuracy, reducing differences, and reducing structural differences
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[0040] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and embodiments.
[0041] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, it indicates There are features, steps, operations, means, components and / or combinations thereof.
[0042] For the convenience of description, spatially relative terms may be used here, such as "on ...", "over ...", "on the surface of ..."...
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Abstract
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