Random number generator used for passive label chip
A random number generator and passive tag technology, applied in random number generators, record carriers used by machines, instruments, etc., can solve the problems of irregular changes, slow speed, poor statistical performance, etc. Statistical, reduced power consumption, low power consumption effect
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- Publication Date
- 2016-11-09
- Estimated Expiration
- Not applicable · inactive patent
Smart Images
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Abstract
Description
technical field
[0001] The invention relates to a random number generator for a passive tag chip. Background technique
[0002] At present, in the field of RFID applications, it is possible that one reader operates on multiple tags, so the anti-collision performance of tags is very important. Most of the existing tag anti-collision algorithms are based on random numbers. Therefore, the use of a random number generator with good randomness has an important impact on improving the anti-collision performance of tags. Random numbers can be divided into two types: true random numbers and pseudo-random numbers. True random numbers are generated by analog circuits. Due to the deviation of the manufacturing process and the change of the working environment, the change of true random numbers has no rules to follow, but the generation speed is relatively slow and the statistics are not good. Pseudo-random numbers have a fixed period, and the random numbers generated follow a fixed ...
Examples
Embodiment Construction
[0011] figure 1 As shown, a random number generator for a passive tag chip is disclosed, including an analog circuit and a digital circuit, the analog circuit generates a random number, and the random number output by the analog circuit is performed by the digital circuit Output processing; makes output random numbers more statistical. Wherein, the analog circuit is mainly composed of a ring oscillator, and the digital circuit is mainly composed of a linear feedback shift register; wherein, the output of the ring oscillator is used as the input of the linear feedback shift register.
[0012] figure 2 It is a structural schematic diagram of the linear feedback shift register of the present invention. This linear feedback shift register is made up of 32 registers; Wherein, the clock of described digital circuit and reset signal are connected to the Clk end and Reset end of each register respectively, and its characteristic polynomial is X 32 +X 30 +X 8 +X 3 +1; guarantees...