Enhanced phase-locked loop for single-phase power grid voltage synchronization information detection

A grid voltage and synchronization information technology, applied in the field of phase-locked loops, can solve problems such as difficult to accurately estimate grid amplitude, frequency and phase angle

Inactive Publication Date: 2019-03-22
哈工大(张家口)工业技术研究院 +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to solve the problem that the existing phase-locked loop is difficult to accurately estimate the amplitude, frequency and phase angle of the power grid when the voltage of the single-phase power grid contains harmonics and DC offsets, and provides a method for synchronizing the voltage of the single-phase power grid. Enhanced Phase-Locked Loop Detection

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  • Enhanced phase-locked loop for single-phase power grid voltage synchronization information detection
  • Enhanced phase-locked loop for single-phase power grid voltage synchronization information detection
  • Enhanced phase-locked loop for single-phase power grid voltage synchronization information detection

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specific Embodiment approach 1

[0033] Specific implementation mode 1: the following combination figure 1 To explain this embodiment, the enhanced phase-locked loop used for the detection of single-phase grid voltage synchronization information described in this embodiment is:

[0034] Input the single-phase grid voltage to the second-order generalized integrator with DC offset estimator to obtain the filtered value and quadrature signal of the input grid voltage without DC offset;

[0035] Input the obtained filtered value and quadrature signal to the two-phase enhanced phase-locked loop to obtain the online estimation value of the amplitude, frequency and phase angle of the single-phase grid voltage;

[0036] In the frequency estimation loop and amplitude estimation loop of the two-phase enhanced phase-locked loop, the first cascade delay signal elimination filter and the second cascade delay signal elimination filter are respectively added to eliminate the input harmonics to the estimation result Impact.

specific Embodiment approach 2

[0037] Specific implementation manner 2: the following combination figure 1 To explain this embodiment, this embodiment will further explain the first embodiment. The specific process of obtaining the filtered value of the input grid voltage and the quadrature signal without DC offset is as follows:

[0038] Step 1. At the beginning of the estimation period, collect the single-phase grid voltage u in , Minus the filtering value u of the last estimation period α And the estimated DC offset u of the previous estimation period dc After that, the filtering error u of this estimation period is obtained err ;

[0039] The filtering error of this estimation period u err Input to the first integrator in the DC offset estimator to obtain the DC offset estimation value u for this estimation period dc ;

[0040] Step 2. The filtering error u of the estimation period obtained in step 1 err Multiply by the factor K 1 , Minus the orthogonal signal u of the previous estimation period β , The diff...

specific Embodiment approach 3

[0042] Specific implementation manner three: the following combination figure 1 To explain this embodiment, this embodiment will further explain the second embodiment. The specific process of obtaining the online estimated values ​​of the amplitude, frequency and phase angle of the single-phase grid voltage is as follows:

[0043] Step 3. The filtered value u of the estimation period obtained in step 2 α And the orthogonal signal u of the estimated period β Subtract the instantaneous estimated value y of the last estimation period respectively α And y β , Obtain the instantaneous value estimation error e of this estimation period α And e β ;

[0044] The instantaneous value estimation error of this estimation period e α And e β Input to the first dot product operator to calculate the frequency error e of the frequency estimation loop of the two-phase enhanced phase-locked loop ω ;

[0045] Frequency error of frequency estimation loop e ω Input to the first cascade delay signal elim...

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Abstract

The inventio belongs to the field of electrical energy conversion, and provides an enhanced phase-locked loop for single-phase power grid voltage synchronization information detection, which aims to solve the problem of the conventional phase-locked loop that the amplitude, the frequency and the phase angle of a power grid cannot be accurately estimated when a single-phase power grid voltage contains harmonic waves and direct current (DC) offsets. The enhanced phase-locked loop is characterized in that the single-phase power grid voltage is input into a second-order generalized integrator witha DC offset estimator, so that a filter value and an orthogonal signal of the input power grid voltage not containing the DC offsets are obtained; the filter value and the orthogonal signal that areobtained are input into a two-phase enhanced phase-locked loop, so that online estimation values of the amplitude, the frequency and the phase angle of the single-phase power grid voltage are obtained; and a first cascading delay signal elimination filter and a second cascading delay signal elimination filter are respectively added into a frequency estimation loop and an amplitude estimation loopof the two-phase enhanced phase-locked loop, so that effects of the input harmonic waves on estimation results are eliminated. The enhanced phase-locked loop provided by the invention is used for online accurate estimations under non-ideal power grid conditions.

Description

Technical field [0001] The invention relates to a phase-locked loop used for detecting the voltage synchronization information of a single-phase power grid, and belongs to the field of electric energy conversion. Background technique [0002] Power electronic equipment is increasing day by day. The current civil single-phase power grid is affected by the increase of connected power electronic equipment, and there are problems such as large grid harmonics and DC offset. Therefore, non-ideal power grid conditions bring greater difficulty to the accurate online real-time estimation of the synchronization information of the power grid, including amplitude, frequency and phase angle. [0003] The phase-locked loop technology used for real-time estimation of single-phase grid voltage synchronization information mainly includes single-phase enhanced phase-locked loop and two-phase synchronous rotating coordinate system phase-locked loop based on virtual quadrature signal. The single-phas...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/081
CPCH03L7/081
Inventor 王贵忠吴凤江李洪波侯英伟张国庆于文斌郭志忠
Owner 哈工大(张家口)工业技术研究院
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