Hardware encryption and decryption system and method

An encryption and decryption, hardware technology, applied in the field of data security, can solve the problems of reducing the processing efficiency of data packet encryption and decryption, increasing the operating load of the CPU, and increasing the utilization of CPU resources.

CN110110538AInactive Publication Date: 2019-08-09ZHENGZHOU XINDA JIEAN INFORMATION TECH
0 Cites 2 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2019-08-09
Estimated Expiration
Not applicable · inactive patent

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
Patent Text Reader

Abstract

The invention provides a hardware encryption and decryption system and method. The hardware encryption and decryption system comprises a receiving buffer module, an allocation module, an algorithm pool, a collection module, an intermediate buffer module and a sending buffer module which are integrated in an encryption and decryption chip. The hardware encryption and decryption system and method can call algorithms in an algorithm pool for data packets which are sent into the encryption and decryption chip and have different protocols for multiple times; the encryption and decryption of the data packet is completed through the encryption and decryption processing module and the output of the data packet which is completely processed at the sending buffer module, the whole encryption and decryption processing process does not need logic processing of a processor, the operation load of the processor is reduced, maximum utilization of algorithm resources is realized, and the encryption anddecryption processing efficiency of the data packet is effectively improved.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention relates to the technical field of data security, in particular to a hardware encryption and decryption system and method. Background technique

[0002] FPGA (Field-Programmable Gate Array), that is, field programmable gate array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of original programmable device gates.

[0003] In the information age where information security is increasingly valued by people, data processing and storage products require not only the function of processing data, but also the functions of virus protection and encryption and decryption. In response to this requirement, there are currently two schemes on the market, software encryption and decry...

Examples

Embodiment Construction

[0044] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0045] It should be noted that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be an intervening component at the same time.

[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terms used herein in the description of the present in...